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US 2019/0163251 A1Published application
Dynamic Interrupt Rate Control in Computing Systems
AssigneeAdvanced Micro Devices, Inc.
InventorsSridhar V. Gada, Alexander J. Branover
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AssigneeAdvanced Micro Devices, Inc.
InventorsSridhar V. Gada, Alexander J. Branover
Estimating the term…
Systems, apparatuses, and methods for intentionally delaying servicing of interrupts in a computing system are disclosed. A computing system includes a processor that services interrupts generated by components of the computing system. An interrupt controller detects a received interrupt and intentionally delays servicing of the interrupt depending on various conditions. If the interrupt is a first type of interrupt and the processor is in a first power state, servicing of the interrupt is delayed by a first period of time. If the interrupt corresponds to the first type of interrupt and the processor is in a second power state, servicing of the interrupt is delayed for a period of time that is longer than the first period of time. If a non-maskable interrupt is received before expiration of either the first or second period of time, then servicing of any previously delayed interrupts is allowed to proceed.
A system for coalescing interrupts, the system comprising:
A method for coalescing interrupts in a computing system, the method comprising:
An apparatus, comprising:
Dependencies are inferred from the claim text.