Novel jitter monitoring cirucit

A circuit, comprising:

• a first delay circuit configured to receive a first clock signal;
• a second delay circuit configured to receive a second clock signal;
• a delay control circuit, coupled to the first and second delay circuits, and configured to cause the first and second delay circuits to align the first and second clock signals within a noise window;
• a loop control circuit, coupled to the first and second delay circuits, and configured to alternately form a first oscillation loop and a second oscillation loop passing through each of the first and second delay circuits;
• a first frequency counter, coupled to the first delay circuit, and configured to count a number of cycles of the first and second oscillation loops passing through the first delay circuit using a reference frequency;
• and
• a second frequency counter, coupled to the second delay circuit, and configured to a number of cycles of the first and second oscillation loops passing through the second delay circuit using the reference frequency,
• wherein the noise window is determined based on the reference frequency and a difference between the number of cycles of the first and second oscillation loops passing through the first delay circuit and the number of cycles of the first and second oscillation loops passing through the second delay circuit.

A method, comprising:

• receiving a first clock signal and a second clock signal;
• delaying the first and second clock signals by a first delay circuit and a second delay circuit, respectively, to align the first and second clock signals within a noise window;
• and
• alternately forming a first oscillation loop and a second oscillation loop passing through each of the first and second delay circuits to determine the noise window.