Circuit board and layout structure
AssigneeWistron Corporation
InventorsChang-Chun Wang, Su-Kai Hsu
Life of this patent
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Abstract
A circuit board and a layout structure are provided. The layout structure includes a plurality of chip carrying areas, a plurality of inner layer connection pads and a plurality of outer leading wires. The chip carrying areas respectively carry a plurality of chips. The outer leading wires are disposed between the inner layer connection pads and the chip carrying areas. The layout structure is disposed on at least one circuit board and connects to a plurality of wires of the at least one circuit board through the outer leading wires, and the outer leading wires and the wires of the at least one circuit board are formed by sharing at least one metal layer.
Claims20
A layout structure, comprising:
- a plurality of chip carrying areas, respectively carrying a plurality of chips;
- a plurality of inner layer connection pads, disposed on at least one edge of the layout structure;
- and
- a plurality of outer leading wires, disposed between the inner layer connection pads and the chip carrying areas,
- wherein the layout structure is disposed on at least one first circuit board and is connected to a plurality of wires of the at least one first circuit board through the outer leading wires, and the outer leading wires and the wires of the at least one first circuit board are formed by sharing at least one first metal layer,
- wherein each of the outer leading wires extends along a first direction for connecting the corresponding inner layer connection pad, and the at least one edge corresponding to the corresponding inner layer connection pad extends along a second direction, wherein the first direction is orthogonal to the second direction.
(canceled)
A circuit board, comprising:
- a plurality of wires;
- and
- at least one layout structure, comprising:
- a plurality of chip carrying areas, respectively carrying a plurality of chips;
- a plurality of inner layer connection pads, disposed on at least one edge of the layout structure;
- and
- a plurality of outer leading wires, disposed between the inner layer connection pads and the chip carrying areas,
- wherein the layout structure is disposed on the circuit board and is connected to the wires of the circuit board through the outer leading wires, and the outer leading wires and the wires of the circuit board are formed by sharing at least one first metal layer,
- wherein each of the outer leading wires extends along a first direction for connecting the corresponding inner layer connection pad, and the at least one edge corresponding to the corresponding inner layer connection pad extends along a second direction, wherein the first direction is orthogonal to the second direction.
(canceled)
Dependencies are inferred from the claim text.