Single-slope comparison device with low-noise, and analog-to-digital conversion device and cmos image sensor including the same

An analog-to-digital conversion device, comprising:

• a most significant bit (MSB) voltage generation circuit that includes a control signal terminal to receive an MSB voltage control signal and is structured to generate an MSB voltage;
• a comparison circuit including a first input terminal coupled to receive a first input signal and a second input terminal coupled to receive a second input signal that is modified by the MSB voltage outputted from the MSB voltage generation circuit to output an MSB comparison result signal, the comparison circuit comparing the first input signal with a residue voltage and outputting a least significant bit (LSB) comparison result signal;
• a control circuit coupled to the comparison circuit to receive the comparison signal and operable to detect a crossing of the first input signal and the second input signal according to the MSB comparison result signal and to output the MSB voltage control signal to the MSB voltage generation circuit;
• and
• a counting circuit coupled to the comparison circuit to perform an MSB counting operation according to the MSB comparison result signal outputted from the comparison circuit and to perform an LSB counting operation according to the LSB comparison result signal.

A complementary metal oxide semiconductor (CMOS) image sensor, comprising:

• a pixel array comprising pixels arranged in rows and columns wherein each pixel is operable to generate a pixel signal corresponding to incident light received at each pixel;
• a row decoder coupled to the pixel array and operable to select and control pixels of the pixel array row by row;
• a ramp signal generator structured to generate a ramp signal of a residue range;
• a most significant bit (MSB) voltage generation circuit structured to generate an MSB voltage according to an MSB voltage control signal;
• a comparison circuit suitable for comparing an offset reference voltage with a voltage at an input terminal of the comparison circuit obtained by adding or subtracting the MSB voltage to or from a pixel signal to modify the voltage at the input terminal to output an MSB comparison result signal, the comparison circuit comparing a ramp signal of a residue range with a residue voltage, which is the modified voltage at the input terminal, and outputting a least significant bit (LSB) comparison result signal;
• a control circuit coupled to the comparison circuit to receive the comparison signal and operable to detect a crossing of the offset reference voltage and the modified voltage at the input terminal according to the MSB comparison result signal and to output the MSB voltage control signal to the MSB voltage generation circuit;
• a counting circuit coupled to the comparison circuit to perform an MSB counting operation according to the MSB comparison result signal outputted from the comparison circuit and to perform an LSB counting operation according to the LSB comparison result signal;
• a memory coupled to the counting circuit and operable to store information outputted from the counting circuit;
• a column read-out circuit coupled to the memory and operable to output the information stored in the memory;
• and
• a control circuit coupled to and operable to control the row decoder, the ramp signal generator, the comparison circuit, the counting circuit, the memory and the column read-out circuit.

A complementary metal oxide semiconductor (CMOS) image sensor, comprising:

• a pixel array comprising pixels arranged in rows and columns wherein each pixel is operable to generate a pixel signal corresponding to incident light received at each pixel;
• a row decoder coupled to the pixel array and operable to select and control pixels of the pixel array row by row;
• a ramp signal generator structured to generate a ramp signal of a residue range;
• a most significant bit (MSB) voltage generation circuit structured to an MSB voltage according to an MSB voltage control signal;
• a comparison circuit suitable for comparing a pixel signal with an offset reference voltage that is modified by the MSB voltage outputted from the MSB voltage generation circuit to output an MSB comparison result signal, the comparison circuit comparing the pixel signal with a residue voltage to output a least significant bit (LSB) comparison result signal;
• a control circuit coupled to the comparison circuit to receive the comparison signal and operable to detect a crossing of the pixel signal and the modified offset reference voltage according to the MSB comparison result signal outputted from the comparison circuit to output the MSB voltage control signal to the MSB voltage generation circuit;
• a counting circuit coupled to the comparison circuit to perform an MSB counting operation according to the MSB comparison result signal outputted from the comparison circuit and to perform an LSB counting operation according to the LSB comparison result signal;
• a memory coupled to the counting circuit and operable to store information outputted from the counting circuit;
• a column read-out circuit coupled to the memory and operable to output the information stored in the memory;
• and
• a control circuit coupled to and operable to control the row decoder, the ramp signal generator, the comparison circuit, the counting circuit, the memory and the column read-out circuit.