Lin-compatible fast-data bus
AssigneeSemiconductor Components Industries, LLC
InventorsMarek HUSTAVA, Tomas SUCHY
Life of this patent
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Abstract
Methods and transceivers are provided for enabling fast-data messages on a local interconnect network (LIN) compatible bus. One illustrative slave transceiver embodiment includes: a comparator and a digital-to-analog converter (DAC). The comparator detects amplitude modulation of a bias voltage at a first baud rate on a serial bus line to receive a first LIN frame header having a frame identifier for a fast-data frame. The DAC responsively drives a fast-data response message having an expanded payload and/or a higher baud rate on the serial bus line.
Claims20
An extended local interconnect network (LIN) bus communication method for a slave LIN bus transceiver, the method comprising:
- receiving a first LIN frame header at a first baud rate on a serial bus line, the first LIN frame header having a frame identifier for a fast-data frame;
- and
- sending a fast-data response message at a second baud rate on the serial bus line, the second baud rate being larger than the first baud rate.
An extended LIN bus communication method for a master LIN bus transceiver, the method comprising:
- sending a first LIN frame header at a first baud rate on a serial bus line, the first LIN frame header having a frame identifier for a fast-data frame;
- and
- receiving a fast-data response message at a second baud rate on the serial bus line, the second baud rate being larger than the first baud rate.
A slave LIN bus transceiver that comprises:
- a comparator that detects amplitude modulation of a bias voltage at a first baud rate on a serial bus line to receive a first LIN frame header having a frame identifier for a fast-data frame;
- and
- a digital-to-analog converter (DAC) that responsively drives a fast-data response message having more than eight data bytes.
Dependencies are inferred from the claim text.