Encoding and decoding architecture for high-speed data communication system and related physical layer circuit, transmitter and receiver and communication system thereof

A communication system based on a multi-wire communication link, comprising:

• a transmitter, comprising:
• a controller arranged to provide a word of data;
• a first physical layer circuit, coupled to the controller, arranged to generate a sequence of wire states according to the word of data comprising:
• an encoding chain arranged to convert a plurality of symbols that are not serialized into a plurality of wire states;
• a first interfacing circuit coupled to the first physical layer circuit and the multi-wire communication link, arranged to controlling levels of a plurality of wires of the multi-wire communication link according to a sequence of wire states generated by the first physical layer circuit;
• a receiver, comprising:
• a second interfacing circuit, coupled to the multi-wire communication link, arranged extract the sequence of wire states from the plurality of wires of the multi-wire communication link;
• a second physical layer unit coupled to the second interfacing circuit, arranged to reproduce the word of data according the sequence of wire states, comprising:
• a decoding chain arranged to convert a plurality of wire states, which are deserialized from the sequence of the wire states, into a plurality of symbols;
• a controller, coupled to the second physical layer circuit, arranged to receive and process the word of data.