Use of multiple cyclic redundancy codes for optimized fail isolation

A system comprising:

• a memory having computer readable instructions;
• and
• one or more processors for executing the computer readable instructions, the computer readable instructions controlling the one or more processors to perform operations comprising:
• calculating, by a transmitter, source cyclic redundancy code (CRC) bits for payload bits in one or more frames of bits, the source CRC bits comprising source CRC bits for a first type of CRC check and source CRC bits for a second type of CRC check, the transmitter coupled to a receiver via a communication channel;
• storing the source CRC bits at the transmitter;
• transmitting, via the communication channel, the payload bits and the source CRC bits for the first type of CRC check to the receiver, wherein the receiver performs the first type of CRC check based at least in part on the payload bits and the source CRC bits for the first type of CRC check, and the receiver calculates and stores at the receiver calculated CRC bits for the payload bits, the calculated CRC bits comprising calculated CRC bits for the second type of CRC check;
• receiving a status of the first type of CRC check from the receiver;
• and
• based on the status of the first type of CRC check indicating an error, initiating a comparison of previously calculated CRC bits including the source CRC bits for the second type of CRC check and the calculated CRC bits for the second type of CRC check.

A computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions executable by a processor to cause the processor to perform operations comprising:

• calculating, by a transmitter, source cyclic redundancy code (CRC) bits for payload bits in one or more frames of bits, the source CRC bits comprising source CRC bits for a first type of CRC check and source CRC bits for a second type of CRC check, the transmitter coupled to a receiver via a communication channel;
• storing the source CRC bits at the transmitter;
• transmitting, via the communication channel, the payload bits and the source CRC bits for the first type of CRC check to the receiver, wherein the receiver performs the first type of CRC check based at least in part on the payload bits and the source CRC bits for the first type of CRC check, and the receiver calculates and stores at the receiver calculated CRC bits for the payload bits, the calculated CRC bits comprising calculated CRC bits for the second type of CRC check;
• receiving a status of the first type of CRC check from the receiver;
• and
• based on the status of the first type of CRC check indicating an error, initiating a comparison of previously calculated CRC bits including the source CRC bits for the second type of CRC check and the calculated CRC bits for the second type of CRC check.