TI ADC Circuit

A time-interleaved, TI, analog-to-digital converter, ADC, circuit, comprising

• a plurality of L analog inputs, wherein the i:th analog input is for receiving an i:th analog input signal;
• a plurality of L digital outputs, wherein the i:th digital output is for outputting an i:th digital output signal, which is a digital representation of the i:th analog input signal, wherein the TI ADC circuit is configured to generate one sample of each of the L digital output signals per conversion cycle;
• a set of sub ADCs, wherein each sub ADC is configured to generate a digital output sample in M conversion cycles, wherein M is an integer >1, and wherein the number K of sub ADCs in the set of sub ADCs >L·M;
• and
• a control circuit configured to select, for each input sample of each of the L analog input signals, which available sub ADC in the set of sub ADCs should operate on that input sample, such that at least some of the sub ADCs, over time, operate on input samples of each of the L analog input signals.

A receiver circuit comprising:

• a time-interleaved, TI, analog-to-digital converter, ADC, circuit for converting a received analog signal to a digital representation, wherein the TI ADC circuit comprises:
• a plurality of L analog inputs, wherein the i:th analog input is for receiving an i:th analog input signal;
• a plurality of L digital outputs, wherein the i:th digital output is for outputting an i:th digital output signal, which is a digital representation of the i:th analog input signal, wherein the TI ADC circuit is configured to generate one sample of each of the L digital output signals per conversion cycle;
• a set of sub ADCs, wherein each sub ADC is configured to generate a digital output sample in M conversion cycles, wherein M is an integer >1, and wherein the number K of sub ADCs in the set of sub ADCs >L·M;
• and
• a control circuit configured to select, for each input sample of each of the L analog input signals, which available sub ADC in the set of sub ADCs should operate on that input sample, such that at least some of the sub ADCs, over time, operate on input samples of each of the L analog input signals.

A communication apparatus comprising a receiver circuit, wherein the receiver circuit comprises a time-interleaved, TI, analog-to-digital converter, ADC, circuit for converting a received analog signal to a digital representation, wherein the TI ADC circuit comprises:

• a plurality of L analog inputs, wherein the i:th analog input is for receiving an i:th analog input signal;
• a plurality of L digital outputs, wherein the i:th digital output is for outputting an i:th digital output signal, which is a digital representation of the i:th analog input signal, wherein the TI ADC circuit is configured to generate one sample of each of the L digital output signals per conversion cycle;
• a set of sub ADCs, wherein each sub ADC is configured to generate a digital output sample in M conversion cycles, wherein M is an integer >1, and wherein the number K of sub ADCs in the set of sub ADCs >L·M;
• and
• a control circuit configured to select, for each input sample of each of the L analog input signals, which available sub ADC in the set of sub ADCs should operate on that input sample, such that at least some of the sub ADCs, over time, operate on input samples of each of the L analog input signals.