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US 2019/0157450 A1Published application
Semiconductor integrated circuit device
AssigneeFuji Electric Co., Ltd.
InventorMasaharu YAMAJI
Life of this patent
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Abstract
A p−-type isolation region is provided at a part between a p-type ground region and a circuit region (a high potential region and an intermediate potential region) in an n-type well region. The p−-type isolation region is electrically connected with a H-VDD pad and an n+-type drain region of a HVNMOS. The p−-type isolation region has between n+-type pickup connect regions and between n+-type drain regions of two of the HVNMOSs, a protruding part (a T-shaped part, an L-shaped part, a partial U-shaped part) or an additional part that protrudes toward a p-ground region.
Claims14
A semiconductor integrated circuit device comprising:
- a first second-conductivity-type well region of a second conductivity type provided in a surface layer of a first-conductivity-type semiconductor layer of a first conductivity type;
- a circuit region formed in the first second-conductivity-type well region;
- a second second-conductivity-type well region of the second conductivity type provided in the surface layer of the first-conductivity-type semiconductor layer and in contact with the first second-conductivity-type well region, the second second-conductivity-type well region surrounding a periphery of the first second-conductivity-type well region and having an impurity concentration that is lower than that of the first second-conductivity-type well region;
- a first-conductivity-type well region of the first conductivity type provided in the surface layer of the first-conductivity-type semiconductor layer and in contact with the second second-conductivity-type well region, the first-conductivity-type well region surrounding a periphery of the second second-conductivity-type well region;
- a first isolating region of the first conductivity type provided separated from and a predetermined distance farther inward than is the first-conductivity-type well region, the first isolating region having a part that in an opened layout, is interposed between the circuit region and the first-conductivity-type well region and that is provided at a depth reaching the first-conductivity-type semiconductor layer from a surface of the first second-conductivity-type well region or the second second-conductivity-type well region;
- a second-conductivity-type high concentration region of the second conductivity type provided in the first second-conductivity-type well region and having an impurity concentration that is higher than that of the first second-conductivity-type well region;
- a first electrode in contact with the second-conductivity-type high concentration region;
- a first field plate that is a part of the first electrode extended farther outward than is an outer periphery of the first second-conductivity-type well region;
- and
- an insulated gate semiconductor element having, as a drain region, a second-conductivity-type region of the second conductivity type of the first second-conductivity-type well region or the second second-conductivity-type well region, the second-conductivity-type region being provided a predetermined distance farther inward than is the first isolating region;
- the insulated gate semiconductor element having, as a drift region, the first second-conductivity-type well region or the second second-conductivity-type well region, or first second-conductivity-type well region and the second second-conductivity-type well region, and the insulated gate semiconductor element having, as a base region, the first-conductivity-type well region, wherein
- the first isolating region includes any one of:
- a protruding part at a location other than inside the drain region and protruding farther outward than is the outer periphery of the first second-conductivity-type well region, and
- an additional part provided separated from and farther outward than is the first isolating region,
- the protruding part sandwiches the interlayer insulating film with the first field plate and is covered by the first field plate, the protruding part being positioned farther inward than is the outer periphery of the first field plate and the protruding part being near the outer periphery of the first field plate, and
- the additional part sandwiches the interlayer insulating film with the first field plate and is covered by the first field plate, the additional part being positioned farther inward than is the outer periphery of the first field plate and the additional part being near the outer periphery of the first field plate.
13 more elements
A semiconductor integrated circuit device comprising:
- a first second-conductivity-type well region of a second conductivity type provided in a surface layer of a first-conductivity-type semiconductor layer of a first conductivity type;
- a circuit region formed in the first second-conductivity-type well region;
- a second second-conductivity-type well region of the second conductivity type provided in the surface layer of the first-conductivity-type semiconductor layer and in contact with the first second-conductivity-type well region, the second second-conductivity-type well region surrounding a periphery of the first second-conductivity-type well region and having an impurity concentration that is lower than that of the first second-conductivity-type well region;
- a first-conductivity-type well region of the first conductivity type provided in the surface layer of the first-conductivity-type semiconductor layer and in contact with the second second-conductivity-type well region, the first-conductivity-type well region surrounding a periphery of the second second-conductivity-type well region;
- a first isolating region of the first conductivity type provided separated from and a predetermined distance farther inward than is the first-conductivity-type well region, the first isolating region having a part that in an opened layout, is interposed between the circuit region and the first-conductivity-type well region and that is provided at a depth reaching the first-conductivity-type semiconductor layer from a surface of the first second-conductivity-type well region or the second second-conductivity-type well region;
- a second-conductivity-type high concentration region of the second conductivity type provided in the first second-conductivity-type well region and having an impurity concentration that is higher than that of the first second-conductivity-type well region;
- a first electrode in contact with the second-conductivity-type high concentration region;
- a second isolation region provided in the second second-conductivity-type well region and opposing the first isolating region on an inner side;
- a first-conductivity-type high concentration region of the first conductivity type provided in the first-conductivity-type well region, the first-conductivity-type high concentration region having an impurity concentration higher than that of the first-conductivity-type well region;
- a second electrode in contact with the first-conductivity-type high concentration region;
- a first field plate that is a part of the first electrode extending farther outward than is an outer periphery of the first second-conductivity-type well region;
- a second field plate that is part of the second electrode extending farther inward than is an inner periphery of the first-conductivity-type well region;
- and
- an insulated gate semiconductor element having, as a drain region, a second-conductivity-type region of the second conductivity type of the first second-conductivity-type well region or the second second-conductivity-type well region, the second-conductivity-type region being provided a predetermined distance farther inward than is the first isolating region;
- the insulated gate semiconductor element having, as a drift region, the first second-conductivity-type well region or the second second-conductivity-type well region, or first second-conductivity-type well region and the second second-conductivity-type well region;
- and the insulated gate semiconductor element having, as a base region, the first-conductivity-type well region, wherein
- the second isolation region, at a location other than an outer side of the drain region, sandwiches the interlayer insulating film with the second field plate and is covered by the second field plate, the second isolation region being positioned farther inward than is an inner periphery of the second field plate and the second isolation region being positioned near the inner periphery of the second field plate.
14 more elements
Dependencies are inferred from the claim text.