Integrated circuit connection arrangement for minimizing crosstalk

A method comprising:

• providing a leadframe having perimeter package leads and a ground voltage lead;
• forming a bottom semiconductor die comprising:
• i) a first frontside active layer having first frontside electrical contacts, ii) a first backside portion, and iii) a buried oxide layer, the buried oxide layer being situated between the first frontside active layer and the first backside portion;
• flip-chip mounting the bottom semiconductor die to the leadframe, the flip-chip mounting comprising electrically connecting and physically mounting the first frontside electrical contacts of the bottom semiconductor die to the leadframe, a first electrical contact of the first frontside electrical contacts being electrically connected and physically mounted to the ground voltage lead of the leadframe;
• providing a top semiconductor die, the top semiconductor die comprising:
• i) a second frontside having second frontside electrical contacts, and ii) a second backside;
• and
• mounting the top semiconductor die to the bottom semiconductor die, the second backside of the top semiconductor die being attached to the first backside portion of the bottom semiconductor die;
• wherein:
• the first frontside active layer of the bottom semiconductor die comprises a circuit electrically connected to the first frontside electrical contacts by respective first frontside electrical connections and electrically connected to the first backside portion by a first backside connection through the buried oxide layer;
• and
• the first backside portion of the bottom semiconductor die is electrically connected to the ground voltage lead of the leadframe through the first backside connection and the first electrical contact of the first frontside electrical contacts to minimize crosstalk.