Back-channel-etched tft substrate and manufacturing method thereof

A back-channel-etched (BCE) thin film transistor (TFT) substrate, comprising:

• a base substrate, a gate disposed on the base substrate, a gate insulating layer disposed on the base substrate and the gate, an active layer disposed on the gate insulating layer and corresponding to the above of the gate, a source and a drain separated with interval and disposed on the active layer and the gate insulating layer, a passivation layer disposed on the source, the drain, and the active layer, and a pixel electrode disposed on the passivation layer;
• a via being disposed on the passivation layer and corresponding to the above of the drain, the pixel electrode contacting with the drain through the via;
• the active layer comprising the first IGZO thin film on the gate insulating layer and the second IGZO thin film on the first IGZO thin film;
• the first IGZO thin film being presented as a thin film formed by polycrystalline IGZO particles;
• the second IGZO thin film being presented as a C-axis crystallized IGZO thin film.

A manufacturing method of back-channel-etched (BCE) thin film transistor (TFT) substrate, comprising:

• providing a base substrate, forming a gate on the base substrate, forming a gate insulating layer on the gate and the base substrate;
• forming a patternized photo-resist layer on the gate insulation layer, the patternized photo-resist layer surrounding a predetermined area for an active layer on the gate insulation layer to obtain a to-be-film-formed substrate;
• preparing a polycrystalline IGZO particle suspension solution, immersing the to-be-film-formed substrate in the polycrystalline IGZO particle suspension solution, covering the photo-resist layer and the gate insulating layer with a layer of polycrystalline IGZO particles to form a first IGZO thin film;
• stripping off the photo-resist layer, a portion of the first IGZO thin film corresponding to the predetermined area of the active layer remaining;
• depositing a second IGZO thin film on the first IGZO thin film and the gate insulating layer by a sputtering process, a portion of the second IGZO thin film corresponding to the portion above the first IGZO thin film being presented as a C-axis crystallized IGZO thin film, and a portion corresponding to the portion above the gate insulating layer being presented as an amorphous IGZO thin film;
• patternizing the second IGZO thin film to remove a portion of the second IGZO thin film corresponding to the portion above the gate insulating layer and being presented as an amorphous IGZO thin film, keeping the a portion of the second IGZO thin film corresponding to the portion above the first IGZO thin film and being presented as a C-axis crystallized IGZO thin film;
• the kept portion of the second IGZO thin film and the first IGZO thin film together forming an active layer;
• forming a source and a drain on the active layer and the gate insulating layer;
• forming a passivation layer on the gate insulating layer, the source, the drain, and the active layer, forming a via on the passivation layer corresponding to the above of the drain;
• forming a pixel electrode on the passivation layer, and the pixel electrode contacting with the drain through the via;
• wherein the patternized photo-resist layer being realized by coating photo-resist and lithography process;
• further comprising a step of cleaning and drying the substrate after stripping off the photo-resist layer;
• wherein the polycrystalline IGZO particle suspension solution comprising polycrystalline IGZO particles and a solvent, and the solvent being an inorganic solvent or an organic solvent;
• wherein the sputtering of the second IGZO thin film being performed at a temperature of more than 300° C.