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US 2019/0157424 A1Published application
Transistors with dielectric-isolated source and drain regions
AssigneeInternational Business Machines Corporation
InventorsKangguo Cheng, Choonghyun Lee, Juntao Li, Peng Xu
Life of this patent
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Abstract
Semiconductor devices include a semiconductor layer comprising a channel region and source/drain regions. A gate stack is formed on the channel region. A dielectric layer is formed on the semiconductor layer in the source/drain regions. Source/drain structures are formed over the dielectric layer in the source/drain regions.
Claims20
A semiconductor device, comprising:
- a semiconductor layer comprising a channel region and source/drain regions;
- a gate stack formed on the channel region;
- a dielectric layer formed on the semiconductor layer in the source/drain regions;
- and
- source/drain structures formed over the dielectric layer in the source/drain regions.
2 more elements
A planar semiconductor device, comprising:
- a bulk semiconductor substrate comprising a channel region and source/drain regions;
- a gate stack formed on the channel region of the bulk semiconductor substrate;
- a dielectric layer formed in recesses in the source/drain regions of the bulk semiconductor substrate;
- and
- source/drain structures formed over the dielectric layer in the source/drain regions of the bulk semiconductor substrate.
2 more elements
A fin semiconductor device, comprising:
- a fin formed from a bulk semiconductor substrate, comprising a channel region and source/drain regions;
- a gate stack formed on the channel region of the fin;
- a dielectric layer formed on the source/drain regions of the fin;
- and
- source/drain structures formed over the dielectric layer.
2 more elements
Dependencies are inferred from the claim text.