Nanosheet transistor

A nanosheet field-effect transistor device, comprising:

• a vertical stack of nanosheet channel layers;
• a plurality of all-around gate stacks operatively associated with the nanosheet channel layers, the all-around gate stacks including a gate dielectric layer and metal gate material;
• a gate electrode extending vertically from a top surface of the plurality of all-around gate stacks and including first and second vertical sidewalls;
• first and second epitaxial source/drain regions operatively associated with the nanosheet channel layers;
• a dielectric liner including:
• first and second liner portions extending, respectively, over the first and second epitaxial source/drain regions, and
• first and second outer spacer portions extending, respectively, over the first and second vertical sidewalls of the gate electrode,
• wherein the first and second liner portions of the dielectric liner are integral, respectively, with the first and second outer spacer portions of the dielectric liner, and the gate dielectric layer includes vertically extending portions formed on the first and second outer spacer portions of the dielectric liner, the vertically extending portions of the gate dielectric layer being positioned between the vertically extending sidewalls of the gate electrode and the first and second outer spacer portions of the dielectric liner;
• and
• an interlevel dielectric layer extending over the first and second liner portions of the dielectric liner.