Single column compound semiconductor bipolar junction transistor fabricated on iii-v compound semiconductor surface

A method of fabricating a structure including single column bipolar junction transistor device, comprising:

• obtaining a multi-layer structure including:
• a substrate including a III-V compound semiconductor surface,
• an isolation layer on the III-V compound semiconductor surface;
• a bottom semiconductor layer having a first conductivity type, the bottom semiconductor layer being heavily doped and consisting essentially of an epitaxial III-V compound semiconductor material, the isolation layer being between the III-V compound semiconductor surface and the bottom semiconductor layer,
• a sacrificial layer over the bottom semiconductor layer, and
• a dielectric layer over the sacrificial layer;
• forming a trench extending vertically through the dielectric layer and the sacrificial layer;
• epitaxially growing a doped III-V compound semiconductor base layer on the bottom semiconductor layer and within the trench, the base layer having a second conductivity type opposite to the first conductivity type;
• removing the sacrificial layer, thereby forming a space extending around the base layer;
• growing a doped extrinsic base on and completely surrounding the base layer, the doped extrinsic base extending within the space extending around the base layer;
• and
• growing a heavily doped III-V compound top semiconductor layer on a top surface of the base layer, the top semiconductor layer having the first conductivity type.