Full air-gap spacers for gate-all-around nanosheet field effect transistors

A method of forming a semiconductor device, comprising:

• forming a stack of vertically aligned, alternating layers comprising sacrificial layers and channel layers;
• growing source and drain regions from exposed sidewalls of the channel layers;
• forming source and drain contacts to provide electrical connectivity to the source and drain regions;
• forming outer spacers using a first dielectric material that pinches off to form air gaps within the outer spacers after forming the source and drain contacts;
• and
• forming inner spacers between the channel layers that each include a recessed layer of second dielectric material and an air gap.

A semiconductor device, comprising:

• a stack of vertically arranged channel layers;
• a gate stack formed above, between, and around the vertically arranged channel layers;
• source and drain regions grown from sidewalls of the vertically arranged channel layers;
• source and drain conductive contacts;
• inner spacers between the vertically arranged channel layers, each comprising an inner air gap and a recessed layer formed from a first dielectric material;
• and
• outer spacers between the gate stack and the source and drain conductive contacts, each comprising a second dielectric material that is pinched off to form an outer air gap.