Array substrate and manufacturing method thereof
AssigneeShenzhen China Star Optoelectronics Semiconductor Display Technolgy Co., Ltd.
InventorHongyuan XU
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Abstract
An array substrate and a method of manufacturing the array substrate are provided. The method includes providing a substrate, sequentially forming a light-shielding layer, a buffer layer, an active layer, a source, a drain, a gate insulating layer, and a gate on the substrate, performing a first conductorization process on a corresponding region of the active layer opposite to the source and the drain, and performing a second conductorization process on another corresponding region of the active layer between the source and the gate and between the drain and the gate.
Claims9
A method of manufacturing an array substrate, comprising the following steps:
- Step S1:
- providing a substrate, sequentially forming a light-shielding layer, a buffer layer, an active layer, a source, a drain, a gate insulating layer, and a gate on the substrate, wherein an indium gallium zinc oxide layer and a second metal layer are continuously deposited on the buffer layer, and, using a halftone mask, the indium gallium zinc oxide layer is formed into the active layer and the second metal layer is formed simultaneously into the source and the drain;
- Step S2:
- performing a first conductorization process on a corresponding region of the active layer opposite to the source and the drain;
- and
- Step S3:
- performing a second conductorization process on another corresponding region of the active layer between the source and the gate and between the drain and the gate.
An array substrate, comprising:
- a substrate;
- a thin film transistor formed on the substrate, the thin film transistor comprising an active layer, a source, and a drain, the source and the drain correspondingly disposed on two ends of the active layer;
- a gate insulating layer formed on a surface of the thin film transistor;
- and
- a gate formed on the gate insulating layer;
- wherein the active layer is made of indium gallium zinc oxide, a region of the active layer corresponding to the gate is a non-conductive region, another region of the active layer excluding the non-conductive region is a conductive region, the conductive region corresponding to a side of the source is a source region, the conductive region corresponding to a side of the drain is a drain region, the array substrate comprises a channel region configured to form carriers, the non-conductive region of the active layer is an active layer of the channel region, and the active layer of the channel region extends to the source region and a corresponding portion of the active layer opposite to the drain region.
An array substrate, comprising:
- a substrate;
- a thin film transistor formed on the substrate, the thin film transistor comprising an active layer, a source, and a drain, the source and the drain correspondingly disposed on two ends of the active layer;
- a gate insulating layer formed on a surface of the thin film transistor;
- and
- a gate formed on the gate insulating layer;
- wherein the active layer is made of indium gallium zinc oxide, a region of the active layer corresponding to the gate is a non-conductive region, another region of the active layer excluding the non-conductive region is a conductive region, the conductive region corresponding to a side of the source is a source region, and the conductive region corresponding to a side of the drain is a drain region.
Dependencies are inferred from the claim text.