Reverse memory cell
AssigneeSunrise Memory Corporation
InventorsEli Harari, George Samachisa, Yupin Fong
Life of this patent
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Abstract
A non-volatile “reverse memory cell” suitable for use as a building block for a 3-dimensional memory array includes a charge-trapping layer which is programmed or charged through gate-injection, rather than channel-injection. Such a reverse cell may be implemented as either an n-channel memory cell or a p-channel memory cell, without incurring design or process penalties, or any complexity in programming or erase operations. Furthermore, all reading, programming, erase, program-inhibiting operations may be carried out in the reverse memory cell using only positive or only negative voltages, thereby simplifying both the design and the power management operations.
Claims17
A thin-film memory cell, comprising:
- first and second deposited semiconductor layers of a first conductivity type;
- a third deposited semiconductor layer of a second conductivity type provided between the first and second deposited semiconductor layers;
- a first dielectric layer adjacent the third deposited semiconductor layer;
- a charge-trapping layer adjacent the first dielectric layer, the first dielectric layer separating the charge-trapping layer from the third deposited semiconductor layer;
- a second dielectric layer adjacent the charge-trapping layer and spaced apart from the first dielectric layer by the charge-trapping layer;
- and
- a conductive layer adjacent the second dielectric layer and spaced apart from the charge-trapping layer by the second dielectric layer, wherein the first and second dielectric layers have a difference in layer thickness such that, when a sufficiently large potential difference is imposed across the conductive layer and the third deposited semiconductor layer, electric charge is exchanged between the conductive layer and the charge-trapping layer by tunneling through the second dielectric layer.
Dependencies are inferred from the claim text.