Semiconductor device and manufacturing method thereof

A semiconductor device including a non-volatile memory, the non-volatile memory comprising:

• a stacked gate structure including a floating gate and a control gate;
• sidewall spacers disposed on opposing sides of the stacked gate structure;
• and
• an erase gate and a select gate disposed on the opposing sides of the stacked gate structure, respectively,
• wherein an upper surface of the erase gate and a horizontal plane parallel to a surface of the substrate make an angle θat the contact point of the upper surface of the erase gate and the one of the sidewall spacers, where −15°<θ<10° measured from the horizontal plane.

A semiconductor device including a non-volatile memory, the non-volatile memory comprising:

• a stacked gate structure including a floating gate and a control gate;
• sidewall spacers disposed on opposing sides of the stacked gate structure;
• and
• an erase gate and a select gate disposed on the opposing sides of the stacked gate structure, respectively,
• wherein one of the sidewall spacers is inclined toward a select gate side with respect to a normal line to a surface of the substrate, making an angle θ2 between the one of the sidewall spacers and the normal line, wherein 0°<θ2<10° measured from the normal line.