Package structures

A package structure, comprising:

• a first redistribution layer;
• at least one semiconductor chip, located on and electrically connected to the first redistribution layer;
• at least one passive element, located on the first redistribution layer and electrically connected to the at least one semiconductor chip, wherein the at least one passive element is arranged aside of a location of the at least one semiconductor chip;
• an insulating encapsulation, encapsulating the at least one semiconductor chip and the at least one passive element;
• a protection layer, disposed on and partially covering the first redistribution layer, wherein the first redistribution layer is located between the at least one semiconductor chip and the protection layer;
• and
• at least one connecting module, connecting to the first redistribution layer and electrically connected to the at least one semiconductor chip through the first redistribution layer, wherein the at least one connecting module comprises a plurality of pins, and the at least one connecting module is mounted onto the first redistribution layer by the protection layer and is accessibly exposed by the protection layer.

A package structure, comprising:

• a first redistribution layer;
• at least one semiconductor chip, located on and electrically connected to the first redistribution layer;
• at least one passive element, located on the first redistribution layer and electrically connected to the at least one semiconductor chip;
• at least one connecting module, electrically connected to the first redistribution layer and the at least one semiconductor chip, wherein the at least one connecting module comprises a plurality of pins;
• and
• an insulating encapsulation, located on the first redistribution layer, wherein the insulating encapsulation encapsulates the at least one semiconductor chip and the at least one passive element and surrounds the at least one connecting module.