Wafer level chip scale package structure and manufacturing method thereof

A method for manufacturing wafer level chip scale package (WLCSP) structures, the method comprising the steps of:

• forming a semiconductor structure comprising a plurality of semiconductor units;
• attaching the semiconductor structure on a dummy wafer;
• performing a first dicing process using a first cutting tool on the semiconductor structure to form a respective notch on the semiconductor structure between each set of two adjacent semiconductor units of the plurality of semiconductor units, a bottom end surface of the respective notch being curved;
• depositing a molding compound to cover a top surface of the semiconductor structure, the molding compound entirely fill the notches;
• removing the dummy wafer;
• performing a second dicing process with a second cutting tool on the semiconductor structure, the second dicing process cutting through the notches to form the WLCSP structures;
• wherein a first aperture of the first cutting tool is larger than a second aperture of the second cutting tool.