Methods of fabricating semiconductor devices

A method of fabricating a semiconductor device, the method comprising:

• forming an interlayer insulating layer on a substrate;
• forming a preliminary gate electrode in the interlayer insulating layer;
• forming a cutting mask pattern on the interlayer insulating layer, the cutting mask pattern having an opening exposing a top surface of the preliminary gate electrode and a top surface of the interlayer insulating layer;
• dividing the preliminary gate electrode into a pair of gate electrodes by removing a portion of the preliminary gate electrode using the cutting mask pattern as an etch mask,
• wherein dividing the preliminary gate electrode into the pair of gate electrodes includes:
• recessing the exposed top surface of the interlayer insulating layer;
• and
• removing the portion of the preliminary gate electrode after recessing the exposed top surface of the interlayer insulating layer.

A method of fabricating a semiconductor device, the method comprising:

• forming an interlayer insulating layer on a substrate;
• forming at least two preliminary gate electrodes in the interlayer insulating layer, the at least two preliminary gate electrodes extending in a first direction and spaced apart from each other in a second direction, the first direction and the second direction being parallel to a top surface of the substrate and intersecting each other;
• forming a cutting mask pattern on the interlayer insulating layer, the cutting mask pattern having an opening exposing top surfaces of the at least two preliminary gate electrodes and a top surface of the interlayer insulating layer between the at least two of the preliminary gate electrodes,
• recessing the exposed top surface of the interlayer insulating layer using the cutting mask pattern as an etch mask;
• and
• removing a portion of each of the at least two preliminary gate electrodes using the cutting mask pattern as an etch mask, thereby dividing each of the at least two preliminary gate electrodes into a pair of gate electrodes.