Semiconductor product and fabrication process

A process of an integrated circuit (IC), comprising:

• forming a tungsten layer using a chemical vapor deposition process;
• forming an aluminum layer on the tungsten layer;
• forming a hard mask layer on the aluminum layer;
• forming a patterned resist mask layer which covers a first portion of the hard mask layer and which exposes a second portion of the hard mask layer;
• using the patterned resist mask layer, performing a first dry etch process which removes the second portion of the hard mask layer and which exposes an underlying portion of the aluminum layer;
• using the patterned resist mask layer, performing a second dry etch process which removes the underlying portion of the aluminum layer and which exposes an underlying portion of the tungsten layer;
• removing the resist mask layer;
• and
• using the hard mask layer, performing a third dry etch process which removes the underlying portion of the tungsten layer.

A semiconductor device, comprising:

• a semiconductor substrate, including a lateral first region and a lateral second region;
• a gate structure on or in the first region of the substrate;
• a contact structure on or in the first region of the substrate;
• a first dielectric layer on the gate structure and on the first and second regions of the substrate;
• a diffusion barrier layer on the first dielectric layer above the first region of the substrate;
• a tungsten layer on the diffusion barrier layer above the first region of the substrate;
• a aluminum layer on the tungsten layer above the first region of the substrate;
• a hard mask layer on the aluminum layer above the first region of the substrate;
• and
• a second dielectric layer which covers the hard mask layer above the first region of the substrate and which covers the first dielectric layer above the second region of the substrate.