Processing Method of Data Redundancy and Computer System Thereof
AssigneeWiwynn Corporation
InventorsPei-Ling Yu, Chia-Liang Hsu, Bing-Kun Syu
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AssigneeWiwynn Corporation
InventorsPei-Ling Yu, Chia-Liang Hsu, Bing-Kun Syu
Estimating the term…
A processing method of data redundancy is utilized for a Non-Volatile Memory express (NVMe) to transfer data via a fabric channel from a host terminal to a Remote-direct-memory-access-enable Network Interface Controller (RNIC) and a Just a Bunch of Flash (JBOF). The processing method comprises virtualizing a Field Programmable Gate Array (FPGA) of the RNIC into a Dynamic Random Access Memory (DRAM) and storing the data to the DRAM; replicating or splitting the data into a plurality of data packets and reporting a plurality of virtual memory addresses corresponding to the plurality of data packets to the RNIC by the FPGA; and reading and transmitting the plurality of data packets to a plurality of corresponding NVMe controllers according to the plurality of virtual memory addresses; wherein the FPGA reports to the RNIC that a memory size of the FPGA is larger than that of the DRAM.
A processing method of data redundancy, utilized for a Non-Volatile Memory express (NVMe) to transfer data via a fabric channel from a host terminal to a Remote-direct-memory-access-enable Network Interface Controller (RNIC) and a Just a Bunch of Flash (JBOF), the processing method comprising:
A computer system, comprising:
The computer system of claim. 8, wherein the data of the RNIC enter a Peripheral Component Interconnect Express (PCIe) memory controller of a PCIe device, which is virtualized by the FPGA, via a PCIe controller, and the PCIe memory controller replicates or splits the data into the plurality of data packets, and stores the plurality of data packets to the DRAM, wherein a plurality of virtual memory controllers of the PCIe memory controller individually corresponds to a plurality of dual in-line memory modules (DIMM).
Dependencies are inferred from the claim text.