Memory controller, control method for the memory controller, and control method for memory
AssigneeIndustrial Technology Research Institute
InventorsChih-Yen LO, Jenn-Shiang LAI
Life of this patent
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AssigneeIndustrial Technology Research Institute
InventorsChih-Yen LO, Jenn-Shiang LAI
Estimating the term…
A memory controller accessing a memory including a plurality of blocks is provided. The memory controller includes a storage circuit and a control circuit. The storage circuit stores a refresh value and a data table. The data table has a plurality of bits. Each bit indicates whether a corresponding block has valid data. The control circuit selects a specific block according to the refresh value and determines whether the specific block stores valid data according to the data table. When the specific block stores valid data, the control circuit accesses the memory after a first waiting time. When the specific block does not store any data or stores invalid data, the control circuit accesses the memory after a second waiting time. The second waiting time is shorter than the first waiting time.
A memory controller accessing a memory comprising a plurality of memory blocks, comprising:
A control method for a memory controller which accesses a memory comprising a plurality of memory blocks, comprising:
A memory coupled to a memory controller, comprising:
A control method for a memory which comprises a plurality of memory blocks and is controlled by a memory controller, comprising:
Dependencies are inferred from the claim text.