US 2019/0155750 A1 · MULTI-TIER CACHE PLACEMENT MECHANISM

Abstract

Storage of data in a cache system is controlled by a cache monitor. A cache line is filled in response to a memory instruction from a cache client. The cache monitor includes a predictor table and update logic. An entry in the predictor table comprises an instruction identifier that associates the entry with a memory instruction and, for each cache in the system, a reuse counter. The update logic is configured to update a reuse counter table dependent upon cache behavior in response to memory instructions. Storage of data a first data address in cache in response to a memory instruction having a first instruction identifier, is dependent upon reuse counter values in an entry of the predictor table associated with first instruction identifier. Reuse counters are updated dependent upon cache behavior. A Bloom filter or other data structure may be used to associate data addresses with a memory instruction.

Claims29

Dependent claims

A memory apparatus comprising:

a cache system comprising one or more caches, each cache configured to store a plurality of cache lines, each cache line comprising an address tag and a data block, where a cache line is filled in response to a memory instruction from a cache client;
and
a cache monitor comprising:
a predictor table, where an entry in the predictor table comprises an instruction identifier that associates the entry with a memory instruction and, for each of the one or more caches, a reuse counter;
and
update logic, where the update logic is configured to update a reuse counter of an entry in the predictor table dependent upon cache behavior in response to memory instructions;
where, responsive to execution of a memory instruction having a first instruction identifier, for data at a first data address, data at the first data address is stored in the cache system dependent upon reuse counter values in an entry of the predictor table, the entry associated with the first instruction identifier.

4 more elements

A method for guiding placement of data blocks in a cache system, comprising:

when data at a first data address, accessed by a memory instruction having a first instruction identifier, is not stored in a cache of the cache system:
accessing a prediction table dependent upon the first instruction identifier to retrieve reuse data associated with the first memory instruction and the cache;
retrieving a data block containing the first data from a lower order cache of the multi-tier cache or a memory;
and
inserting the data block into one or more caches of the cache system or bypassing the cache system dependent upon the reuse data.

2 more elements

Dependencies are inferred from the claim text.

Multi-tier cache placement mechanism

Life of this patent

Multi-tier cache placement mechanism

Life of this patent

Abstract

Claims29