Systems and methods for efficient cacheline handling based on predictions
AssigneeSamsung Electronics Co., Ltd.
InventorsErik Ernst Hagersten, Andreas Karl Sembrant, David Black-Schaffer
Life of this patent
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Abstract
A data management method for a processor to which a first cache, a second cache, and a behavior history table are allocated, includes tracking reuse information learning cache lines stored in at least one of the first cache and the second cache; recording the reuse information in the behavior history table; and determining a placement policy with respect to future operations that are to be performed on a plurality of cache lines stored in the first cache and the second cache, based on the reuse information in the behavior history table.
Claims20
A data management method for a processor to which a first cache, a second cache, and a behavior history table are allocated, the method comprising:
- tracking reuse information learning cache lines stored in at least one of the first cache and the second cache;
- recording the reuse information in the behavior history table;
- and
- determining a placement policy with respect to future operations that are to be performed on a plurality of cache lines stored in the first cache and the second cache, based on the reuse information in the behavior history table.
A multi-processor system comprising:
- a first cache and a second cache having different cache levels with respect to each other;
- and
- at least one processor core configured to determine a placement policy with respect to future operations that are to be performed on a plurality of cache lines stored in the first cache and the second cache, based on reuse information recorded in a behavior history table,
- wherein the reuse information is information about reuse of learning cache lines stored in at least one of the first cache and the second cache.
A non-transitory computer-readable storage medium comprising instructions that, when executed by a processor to which a first cache, a second cache, and a behavior history table are allocated, cause the processor to perform operations including,
- tracking reuse information learning cache lines stored in at least one of the first cache and the second cache;
- recording the reuse information in the behavior history table;
- and
- determining a placement policy with respect to future operations that are to be performed on a plurality of cache lines stored in the first cache and the second cache, based on the reuse information in the behavior history table.
Dependencies are inferred from the claim text.