System and methods for efficient virtually-tagged cache implementation
AssigneeSamsung Electronics Co., Ltd.
InventorErik Ernst Hagersten
Life of this patent
Estimating the term…
Abstract
A multiprocessor system includes a plurality of nodes and at least one memory, each node containing at least one processor; a first cache configured to store a plurality of first cache lines, the first cache being private to at least one node from among the plurality of nodes; and a second cache configured to store a plurality of second cache lines, the second cache being at a higher level than the first cache, wherein at least one of the first cache lines includes a first associated pointer pointing to a location of one of the second cache lines, and wherein at least one of the second cache lines includes a second associated pointer pointing to a location of one of the first cache lines.
Claims20
A multiprocessor system comprising:
- a plurality of nodes and at least one memory, each node containing at least one processor;
- a first cache configured to store a plurality of first cache lines, the first cache being private to at least one node from among the plurality of nodes;
- and
- a second cache configured to store a plurality of second cache lines, the second cache being at a higher level than the first cache,
- wherein at least one of the first cache lines includes a first associated pointer pointing to a location of one of the second cache lines, and
- wherein at least one of the second cache lines includes a second associated pointer pointing to a location of one of the first cache lines.
A data management method for a system, the system including at least one node, the at least one node including a processor to which a first cache, a second cache, and a memory are allocated, the first cache storing a plurality of first cache lines and being private to the at least one node, and the second cache storing a plurality of second cache lines and being at a higher level than the first cache, comprises:
- storing a first associated pointer pointing to a location of one of the second cache lines, in one of the first cache lines;
- and
- storing a second associated pointer pointing to a location of the first cache lines stored the first associated pointer in the second cache lines pointed by the first associated pointer.
A non-transitory, computer-readable storage medium comprising computer-executable instructions that, when executed by at least one processor to which a virtually tagged cache, a physically tagged cache and a memory are allocated, cause the at least one processor to perform operations including,
- storing a first associated pointer pointing to a location of one of a plurality of second cache lines stored in the physically tagged cache, in one of first cache lines stored in the virtually tagged cache;
- and
- storing a second associated pointer pointing to a location of one of the first cache lines, in one of the second cache lines.
Dependencies are inferred from the claim text.