Fast pipeline restart in processor with decoupled fetcher
AssigneeQUALCOMM Incorporated
InventorsArthur PERAIS, Michael Scott MCILVAINE, Rami Mohammad A. AL SHEIKH, Robert Douglas CLANCY, Luke YEN, Rodney Wayne SMITH
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Abstract
Aspects of the present disclosure include a method, a device, and a computer-readable medium for restarting an instruction pipeline of a processor that includes a decoupled fetcher. A method comprises detecting, in a processor, a re-fetch event, wherein the processor includes an instruction unit (IU) configured to fetch instructions from a decoupled fetcher (DCF), and simultaneously flushing the IU and the DCF in response to detecting of the re-fetch event.
Claims30
A method, wherein the method comprises:
- detecting, in a processor, a re-fetch event, wherein the processor includes an instruction unit (IU) configured to fetch instructions from a decoupled fetcher (DCF);
- and
- simultaneously flushing the IU and the DCF in response to detecting of the re-fetch event.
An apparatus, wherein the apparatus comprises a processor that includes an instruction unit (IU) configured to fetch instruction from a decoupled fetcher (DCF), wherein the processor is configured to:
- detect a re-fetch event;
- and
- simultaneously flush the DCF and the IU in response to detecting of the re-fetch event.
An apparatus, the apparatus comprising:
- means for detecting a re-fetch event;
- and
- means for simultaneously flushing an instruction unit (IU) and a decoupled fetcher (DCF) in response to detecting of the re-fetch event.
A non-transitory computer-readable medium comprising at least one instruction for causing a processor to perform operations, comprising:
- code for detecting a re-fetch event;
- and
- code for simultaneously flushing an instruction unit (IU) and a decoupled fetcher (DCF) in response to detecting of the re-fetch event.
Dependencies are inferred from the claim text.