Tracking Streaming Engine Vector Predicates to Control Processor Execution
AssigneeTexas Instruments Incorporated
InventorsDuc Quang Bui, Joseph Raymond Michael Zbiciak
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Abstract
In a method of operating a computer system, an instruction loop is executed by a processor in which each iteration of the instruction loop accesses a current data vector and an associated current vector predicate. The instruction loop is repeated when the current vector predicate indicates the current data vector contains at least one valid data element and the instruction loop is exited when the current vector predicate indicates the current data vector contains no valid data elements.
Claims20
A method of operating a computer system, the method comprising:
- providing a data vector register having lanes for holding respective data elements;
- providing a valid register having bits that represent the lanes of the data vector register;
- fetching a stream of data elements from a memory subsystem of the computer system;
- forming a data vector by allocating a portion of the data elements to at least a portion of the lanes in the data vector register;
- forming an associated vector predicate by setting the bits in the valid register to indicate which lanes of the data vector register hold a valid data element and which lanes of the data vector register hold invalid data;
- and
- transferring the data vector and the associated vector predicate to a processor of the computer system in response to access of the data vector register by the processor.
A processing system comprising:
- a processor;
- a streaming engine coupled to the processor to provide data to the processor, wherein the streaming engine comprises:
- a data vector register having lanes for holding respective data elements;
- a valid register having bits that represent the lanes of the data vector register;
- and
- an interface coupled to the processor to transfer contents of the data vector register and contents of the valid register to the processor.
A method of operating a computer system, the method comprising:
- executing an instruction loop by a processor in which each iteration of the instruction loop comprises:
- accessing a current data vector and an associated current vector predicate;
- and
- repeating the instruction loop when the current vector predicate indicates the current data vector contains at least one valid data element and exiting the instruction loop when the current vector predicate indicates the current data vector contains no valid data elements.
Dependencies are inferred from the claim text.