Compiler for a processor comprising primary and non-primary functional units
AssigneeInternational Business Machines Corporation
InventorTyler J. Kenney
Life of this patent
Estimating the term…
Abstract
An apparatus and computer program product for generating executable code for a hardware architecture comprising a primary functional unit and a non-primary functional unit are provided. Source code is translated into representative primary functional unit instructions for a representative primary functional unit in a representative processor architecture model wherein functionality of the non-primary functional unit in the hardware architecture is modeled by the representative primary functional unit in the representative processor architecture model. The representative primary functional unit instructions are transformed into executable non-primary functional unit instructions for the non-primary functional unit in the hardware architecture.
Claims14
1-7. (canceled)
An apparatus, comprising:
- a compiler configured to translate source code into representative primary functional unit instructions for a representative primary functional unit in a representative processor architecture model of a hardware architecture comprising a primary functional unit and a non-primary functional unit, wherein functionality of the non-primary functional unit in the hardware architecture is modeled by the representative primary functional unit in the representative processor architecture model;
- and
- an instruction transformer configured to transform the representative primary functional unit instructions into executable non-primary functional unit instructions for the non-primary functional unit in the hardware architecture.
A computer program product for generating executable code for a hardware architecture comprising a primary functional unit and a non-primary functional unit, the computer program product comprising:
- a computer readable storage medium having stored thereon:
- first program instructions executable by a device to cause the device to translate source code into representative primary functional unit instructions for a representative primary functional unit in a representative processor architecture model, wherein functionality of the non-primary functional unit in the hardware architecture is modeled by the representative primary functional unit in the representative processor architecture model;
- and
- second program instructions executable by the device to cause the device to transform the representative primary functional unit instructions into executable non-primary functional unit instructions for the non-primary functional unit in the hardware architecture.
Dependencies are inferred from the claim text.