Wafer level packaging for mems device

A method for forming a MEMS device comprising:

• providing a device wafer having a top device surface and a bottom device surface, wherein the device wafer is processed with a MEMS component in a device region of the device wafer, wherein
• the top device surface includes a top device bond ring surrounding the device region, and
• the bottom device surface includes a bottom device bond ring surrounding the device region,
• the device wafer comprises a surface substrate, a proof mass substrate, and a dielectric layer disposed between the surface substrate and proof mass substrate, wherein the surface substrate includes an isolation region extending to the dielectric layer and isolating the device region on the surface substrate;
• providing a top cap wafer with an outer top cap surface and an inner top cap surface, wherein the inner top cap surface comprises a top cap bond ring surrounding the device region;
• providing a bottom cap wafer with an outer bottom cap surface and an inner bottom cap surface, wherein the inner bottom cap surface comprises a bottom cap bond ring surrounding the device region;
• performing a top eutectic bonding process, the top eutectic bonding process forms a top eutectic bond between the top cap bond ring and the top device bond ring;
• and
• performing a bottom eutectic bonding process, the bottom eutectic bonding process forms a bottom eutectic bond between the bottom cap bond ring and the bottom device bond ring.

A method for forming a MEMS device comprising:

• providing a device wafer having a top device surface and a bottom device surface, wherein the device wafer is processed to form a plurality of MEMS devices, wherein
• a MEMS device includes
• a MEMS component in a device region of the device wafer,
• a top device bond ring on the top device surface surrounding the device region, and
• a bottom device bond ring on the bottom device surface surrounding the device region,
• the device wafer comprises a surface substrate, a proof mass substrate, and a dielectric layer disposed between the surface substrate and proof mass substrate, wherein the surface substrate includes an isolation region extending to the dielectric layer and isolating the device region on the surface substrate;
• providing a top cap wafer with an outer top cap surface and an inner top cap surface, the top cap wafer comprises a plurality of top caps, wherein a top cap includes a top cap bond ring on the inner top cap surface surrounding the device region;
• providing a bottom cap wafer with an outer bottom cap surface and an inner bottom cap surface, the bottom cap wafer comprises a plurality of bottom caps, wherein a bottom cap includes a bottom cap bond ring on the inner bottom cap surface surrounding the device region;
• performing a top eutectic bonding process, the top eutectic bonding process forms a top eutectic bond between the top cap bond rings of the top cap wafer and the top device bond rings of the device wafer;
• and
• performing a bottom eutectic bonding process, the bottom eutectic bonding process forms a bottom eutectic bond between the bottom cap bond rings of the bottom cap wafer and the bottom device bond rings of the device wafer.