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US 2019/0140607 A1Published application
Differential input stages
AssigneeTexas Instruments Incorporated
InventorDaijiro OTANI
Life of this patent
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Abstract
In some embodiments, a differential input stage comprises a first n-type metal oxide semiconductor transistor (NMOS) pair coupled to a first input and a second input, a second NMOS pair coupled to the first input, a first output node, the second input, and a second output node, a first diode coupled to the first NMOS pair and the first output node, a second diode coupled to the first NMOS pair and the second output node, and a cascaded current source coupled to the first NMOS pair and the second NMOS pair.
Claims21
A differential input stage comprising:
- a first n-type metal oxide semiconductor transistor (NMOS) pair coupled to a first input and a second input, the first NMOS pair having one activation threshold;
- a second NMOS pair coupled to the first input, a first output node, the second input, and a second output node, the second NMOS pair having another activation threshold different than the one activation threshold;
- a first diode coupled between one transistor of the first NMOS pair and the first output node;
- a second diode coupled between the other transistor of the first NMOS pair and the second output node;
- and
- a cascaded current source coupled to the first NMOS pair and the second NMOS pair.
3 more elements
(canceled)
An amplifier comprising:
- a differential input stage including:
- a first n-type metal oxide semiconductor transistor (NMOS) pair coupled to a first input and a second input, the first NMOS pair having one activation threshold;
- a second NMOS pair coupled to the first input, the second input, a first output node, and a second output node, the second NMOS pair having another activation threshold different than the one activation threshold;
- a first diode coupled between the first NMOS pair and the first output node;
- a second diode coupled between the first NMOS pair and the second output node;
- and
- a cascaded current source coupled between the first NMOS pair, the second NMOS pair, and a ground;
- and
- an output stage coupled to the first output node and the second output node and including at least one transistor configured to amplify an output of the differential input stage present at the first and second output nodes to produce an amplifier output.
6 more elements
A differential input stage comprising:
- a first diode having a first anode coupled to a first output node;
- a second diode having a second anode coupled to a second output node;
- a first n-type metal oxide semiconductor (NMOS) differential amplifier including:
- a first NMOS transistor comprising including:
- a first gate terminal coupled to a first input;
- a first drain terminal coupled to a cathode of the first diode;
- and
- a first source terminal coupled to a first node;
- and
- a second NMOS transistor including:
- a second gate terminal coupled to a second input;
- a second drain terminal coupled to a cathode of the second diode;
- and
- a second source terminal coupled to the first node;
- a second NMOS differential amplifier comprising including:
- a third NMOS transistor comprising including:
- a third gate terminal coupled to the first input;
- a third drain terminal coupled to the first output node;
- and
- a third source terminal coupled to a second node;
- and
- a fourth NMOS transistor comprising including:
- a fourth gate terminal coupled to the second input;
- a fourth drain terminal coupled to the second output node;
- and
- a fourth source terminal coupled to the second node;
- and
- a cascaded current source coupled between the first node, the second node, and a ground.
25 more elements
Dependencies are inferred from the claim text.