Multi-Protocol Receiver
AssigneeInvecas, Inc.
InventorsPrasad Chalasani, Venkata N.S.N. Rao, Majid Jalali Far
Life of this patent
Estimating the term…
Abstract
A multi-protocol receiver for receiving at least one input signal comprises: a comparator, a protection controller, and a multi-stage current mode logic (“CML”) buffer. The comparator compares a reference voltage and a predefined voltage. At least one output of the comparator is coupled to at least one input of the protection controller. The multi-stage current mode logic buffer receives the input signal and the reference voltage. Outputs of the protection controller are coupled to control inputs of the multi-stage CML buffer for operating the multi-stage CML buffer to process the input signal and the reference signal.
Claims20
A multi-protocol receiver for receiving at least one input signal comprising:
- a comparator for comparing a reference voltage and a predefined voltage;
- a protection controller, wherein at least one output of the comparator is coupled to at least one input of the protection controller;
- and
- a multi-stage current mode logic (“CML”) buffer for processing the input signal and the reference voltage,
- wherein outputs of the protection controller are coupled to control inputs of the multi-stage CML buffer for operating the multi-stage CML buffer to process the input signal and the reference signal.
A method for receiving at least one input signal by a receiver comprising the steps of:
- generating a reference voltage according to a protocol for the at least one input signal;
- generating a predefined voltage;
- comparing the predefined voltage and the reference voltage;
- generating control signals to operate a multi-stage current mode logic (“CML”) buffer based on the compared predefined voltage and reference voltage;
- operating the multi-stage CML buffer based on the generated control signals;
- and
- processing the input signal and the reference signal by the operated multi-stage CML buffer.
A double data rate (“DDR”) receiver for receiving at least one input signal comprising:
- a comparator for comparing a reference voltage and a predefined voltage;
- a protection controller, wherein at least one output of the comparator is coupled to at least one input of the protection controller;
- and
- a two-stage current mode logic (“CML”) buffer,
- wherein the two-stage CML buffer comprises:
- a first CML buffer;
- and a second CML buffer,
- wherein the first CML buffer has inputs for receiving the input signal and the reference voltage,
- wherein the second CML buffer has inputs for receiving the input signal and the reference voltage,
- wherein the first CML buffer and the second CML buffer are serially coupled, and
- wherein outputs of the protection controller are coupled to control inputs of the two-stage CML buffer for operating the two-stage CML buffer to process the input signal and the reference signal.
Dependencies are inferred from the claim text.