Back to results
US 2019/0123729 A1Published application
Semiconductor device
AssigneeRenesas Electronics Corporation
InventorMasataka Minami
Life of this patent
Estimating the term…
Abstract
A semiconductor device that can perform voltage monitoring with a small circuit area is provided. The resistive subdivision circuit RDIV performs the resistive subdivision of the input voltage Vin by means of the input ladder resistor (R1-R4), and drives the nMOS transistors MN1-MN3 by the subdivided input voltages Vi1-Vi3 each having different resistive subdivision ratios, respectively. The pMOS transistor MP0 is provided in common for the pMOS transistors MP1-MP3, and configures a current mirror circuit with each of the pMOS transistors MP1-MP3. The bias current generating circuit IBSG supplies a bias current to the pMOS transistor MP1.
Claims20
A semiconductor device comprising:
- a plurality of output nodes to output respectively comparison results between an input voltage and a plurality of comparison voltages;
- a plurality of first transistors of a first conductive type coupled respectively between the output nodes and a first power supply;
- a plurality of a second transistors of a second conductive type coupled respectively between the output nodes and a second power supply;
- a resistive subdivision circuit to perform resistive subdivision of the input voltage by means of an input ladder resistor and to drive the second transistors respectively by a plurality of subdivided input voltages with different resistive subdivision ratios;
- a third transistor of the first conductive type provided in common for the first transistors to configure a current mirror circuit with each of the first transistors;
- and
- a bias current generating circuit to supply a bias current to the third transistor.
4 more elements
A semiconductor device comprising:
- a plurality of voltage detection units to detect respectively the magnitude of a plurality of input voltages;
- and
- a bias voltage generating circuit provided in common for the voltage detection units,
- wherein each of the voltage detection units comprises:
- a plurality of output nodes to output respectively comparison results between the corresponding input voltage and a plurality of comparison voltages;
- a plurality of first transistors of a first conductive type coupled respectively between the output nodes and a first power supply;
- a plurality of a second transistors of a second conductive type coupled respectively between the output nodes and a second power supply;
- and
- a resistive subdivision circuit to perform resistive subdivision of the corresponding input voltage by means of a plurality of resistive elements and to drive the second transistors respectively by a plurality of subdivided input voltages with different resistive subdivision ratios, and
- wherein the bias voltage generating circuit comprises:
- a third transistor of the first conductive type provided in common for the first transistors in the voltage detection units to configure a current mirror circuit with each of the first transistors;
- and
- a bias current generating circuit to supply a bias current to the third transistor.
10 more elements
A semiconductor device comprising:
- a plurality of voltage detection units to detect respectively the magnitude of a plurality of input voltages;
- and
- a bias current generating circuit provided in common for the voltage detection units,
- wherein each of the voltage detection units comprises:
- a plurality of output nodes to output respectively comparison results between the corresponding input voltage and a plurality of comparison voltages;
- a plurality of first transistors of a first conductive type coupled respectively between the output nodes and a first power supply;
- a plurality of a second transistors of a second conductive type coupled respectively between the output nodes and a second power supply;
- a resistive subdivision circuit to perform resistive subdivision of the corresponding input voltage by means of a plurality of resistive elements and to drive the second transistors respectively by a plurality of subdivided input voltages with different resistive subdivision ratios;
- and
- a third transistor of the first conductive type provided in common for the first transistors to configure a current mirror circuit with each of the first transistors, and
- wherein the bias current generating circuit supplies a bias current respectively to the third transistor in the voltage detection units.
8 more elements
Dependencies are inferred from the claim text.