Processor Using Memory-Based Computation
AssigneeHangZhou HaiCun Information Technology Co., Ltd.
InventorGuobiao ZHANG
Life of this patent
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Abstract
Instead of logic-based computation (LBC), the preferred processor disclosed in the present invention uses memory-based computation (MBC). It comprises an array of computing elements, with each computing element comprising a memory array on a memory level for storing a look-up table (LUT) and an arithmetic logic circuit (ALC) on a logic level for performing arithmetic operations on selected LUT data. The memory level and the logic level are different physical levels.
Claims21
1-20. (canceled)
A processor for implementing a mathematical function, comprising:
- at least first and second memory arrays on a memory level, wherein said first memory array stores at least a first portion of a first look-up table (LUT) for a first non-arithmetic function;
- and, said second memory array stores at least a second portion of a second LUT for a second non-arithmetic function;
- at least an arithmetic logic circuit (ALC) on a logic level for performing at least an arithmetic operation on selected data from said first LUT or said second LUT, wherein said logic level is a different physical level than said memory level;
- and
- means for communicatively coupling said first or second memory array with said ALC;
- wherein said mathematical function is a combination of at least said first and second non-arithmetic functions.
A processor for implementing a mathematical function, comprising:
- at least a memory array on a memory level for storing at least a portion of a look-up table (LUT) for a non-arithmetic function;
- at least an arithmetic logic circuit (ALC) on a logic level for performing at least an arithmetic operation on selected data from said LUT;
- and
- means for communicatively coupling said memory array and said ALC,
- wherein said memory level and said logic level are different physical levels.
Dependencies are inferred from the claim text.