Substrate architecture for solder joint reliabilty in microelectronic package structures and methods of forming the same
AssigneeIntel Corporation
InventorsRobert Nickerson, Nitin Deshpande, Omkar Karhade, Thomas De Bonis
Life of this patent
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Abstract
Methods/structures of joining package structures are described. Those methods/structures may include a first substrate comprising a first die, wherein an underfill material is disposed on a first surface of the first substrate adjacent the first die; and a second substrate disposed on the first substrate, wherein the second substrate comprises at least one opening disposed over the first die, wherein the at least one opening is at least partially filled with the underfill material.
Claims25
A microelectronic package structure comprising:
- a first substrate;
- a first die on a surface of the first substrate;
- an underfill material on the surface of the first substrate adjacent the first die;
- a second substrate over the first die, wherein the second substrate comprises at least one opening, wherein the at least one opening is within a footprint of the first die, and wherein the at least one opening is at least partially filled with the underfill material;
- and
- a second die on the second substrate and over the at least one opening.
A method of forming a microelectronic package structure comprising:
- forming at least one opening in a central portion of an upper substrate;
- attaching the upper substrate to a lower substrate, wherein the lower substrate comprises a first die on a surface of the lower substrate;
- dispensing an underfill material within the at least one opening, wherein the at least one opening is at least partially filled with the underfill material;
- forming the underfill material adjacent the first die;
- attaching a second die on the upper substrate, wherein the at least one opening is within a footprint of the second die.
A microelectronic system, comprising:
- a board;
- a microelectronic package assembly attached to the board, wherein the microelectronic package comprises:
- a first substrate;
- a die on the first substrate, wherein an underfill material is on a first surface of the first substrate adjacent the die;
- and
- a second substrate over the first die, wherein the second substrate comprises at least one opening over the die, and wherein the at least one opening is at least partially filled with the underfill material, and wherein the at least one opening is within a footprint of the first die.
Dependencies are inferred from the claim text.