Solid-state imaging element, imaging device, and electronic device
AssigneeSony Corporation
InventorsKunihiko Izuhara, Yuuko Sonoda
Life of this patent
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Abstract
There is provided a solid-state imaging element in which a first substrate in which a pixel circuit including a pixel array unit is formed and a second substrate in which a plurality of signal processing circuits are formed are laminated, and a common reference clock is supplied to the plurality of signal processing circuits that are formed on the second substrate.
Claims14
A solid-state imaging element in which a first substrate in which a pixel circuit including a pixel array unit is formed and a second substrate in which a plurality of signal processing circuits are formed are laminated, and a common reference clock is supplied to the plurality of signal processing circuits that are formed on the second substrate.
An imaging device in which a first substrate in which a pixel circuit including a pixel array unit is formed and a second substrate in which a plurality of signal processing circuits are formed are laminated, and a common reference clock is supplied to the plurality of signal processing circuits that are formed on the second substrate.
An electronic device in which a first substrate in which a pixel circuit including a pixel array unit is formed and a second substrate in which a plurality of signal processing circuits are formed are laminated, and a common reference clock is supplied to the plurality of signal processing circuits that are formed on the second substrate.
A solid-state imaging element in which a first substrate in which a pixel circuit including a pixel array unit is formed by a plurality of exposures and a second substrate in which a plurality of signal processing circuits are formed by a plurality of exposures are laminated, the solid-state imaging element comprising:
- a plurality of clamp computing units configured to compute a reference level based on output signals of a group of analog digital converting circuits (ADCs) that are included in the plurality of signal processing circuits of the second substrate;
- and
- a reference voltage output unit configured to convert a digital signal of the reference level computed by the clamp computing unit into a reference voltage of an analog signal, and supply the converted value to the ADCs of the ADC group.
An imaging device in which a first substrate in which a pixel circuit including a pixel array unit is formed by a plurality of exposures and a second substrate in which a plurality of signal processing circuits are formed by a plurality of exposures are laminated, the imaging device comprising:
- a plurality of clamp computing units configured to compute a reference level based on output signals of a group of analog digital converting circuits (ADCs) that are included in the plurality of signal processing circuits of the second substrate;
- and
- a reference voltage output unit configured to convert a digital signal of the reference level computed by the clamp computing unit into a reference voltage of an analog signal, and supply the converted value to the ADCs of the ADC group.
An electronic device in which a first substrate in which a pixel circuit including a pixel array unit is formed by a plurality of exposures and a second substrate in which a plurality of signal processing circuits are formed by a plurality of exposures are laminated, the electronic device comprising:
- a plurality of clamp computing units configured to compute a reference level based on output signals of a group of analog digital converting circuits (ADCs) that are included in the plurality of signal processing circuits of the second substrate;
- and
- a reference voltage output unit configured to convert a digital signal of the reference level computed by the clamp computing unit into a reference voltage of an analog signal, and supply the converted value to the ADCs of the ADC group.
Dependencies are inferred from the claim text.