Semiconductor device and fabrication method thereof
AssigneeUnited Microelectronics Corp.
InventorChing-Wen Hung
Life of this patent
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Abstract
A semiconductor device includes a first dielectric layer on a substrate, a hard mask layer on the first dielectric layer, a trench in the hard mask layer and the first dielectric layer, a first source/drain electrode layer on a sidewall of the trench, a second dielectric layer on the first source/drain electrode layer in the trench, a second source/drain electrode layer on the second dielectric layer in the trench, a third dielectric layer on the second source/drain electrode layer in the trench, a 2D material layer overlying the hard mask layer, the first source/drain electrode layer, the second dielectric layer, the second source/drain electrode layer, and the third dielectric layer, a gate dielectric layer on the 2D material layer, and a gate electrode on the gate dielectric layer.
Claims20
A semiconductor device, comprising:
- a substrate;
- a first dielectric layer on the substrate;
- a hard mask layer on the first dielectric layer;
- a trench in the hard mask layer and the first dielectric layer;
- a first source/drain electrode layer on a sidewall of the trench;
- a second dielectric layer on the first source/drain electrode layer in the trench;
- a second source/drain electrode layer on the second dielectric layer in the trench, wherein both of the first source/drain electrode layer and the second source/drain electrode layer extend along the sidewall and a bottom of the trench;
- a third dielectric layer on the second source/drain electrode layer in the trench;
- a two-dimensional (2D) material layer overlying the hard mask layer, the first source/drain electrode layer, the second dielectric layer, the second source/drain electrode layer, and the third dielectric layer;
- a gate dielectric layer on the 2D material layer;
- and
- a gate electrode on the gate dielectric layer.
A method for fabricating a semiconductor device, comprising:
- providing a substrate having thereon an etch stop layer, a first dielectric layer on the etch stop layer, and a hard mask layer on the first dielectric layer;
- forming a trench in the hard mask layer and the first dielectric layer;
- forming a first source/drain electrode layer on a sidewall of the trench, wherein the first source/drain electrode layer extends along the sidewall and a bottom of the trench;
- forming a second dielectric layer to cover the first source/drain electrode layer in the trench;
- forming a second source/drain electrode layer on the second dielectric layer in the trench;
- forming a third dielectric layer on the second source/drain electrode layer in the trench;
- forming a two-dimensional (2D) material layer overlying the hard mask layer, the first source/drain electrode layer, the second dielectric layer, the second source/drain electrode layer, and the third dielectric layer;
- forming a gate dielectric layer on the 2D material layer;
- and
- forming a gate electrode on the gate dielectric layer.
Dependencies are inferred from the claim text.