Semiconductor Package and Image Sensor

A semiconductor package, comprising:

• a package substrate;
• an image sensor comprising a memory region, a logic circuit region stacked on the memory region, and a pixel array region stacked on the logic circuit region, wherein the memory region has a memory chip attached to the logic circuit region by a first chip bonding layer, and a dummy chip attached to the logic circuit region by a second chip bonding layer, wherein the second chip bonding layer has a modulus of elasticity different to that of the first chip bonding layer;
• and
• a bonding layer disposed between the package substrate and the image sensor , wherein the bonding layer attaches the package substrate and the image sensor to each other, and wherein the bonding layer comprises a first region and a second region, wherein the first region has a different modulus of elasticity than that of the second region.

An image sensor, comprising:

• a pixel array region having a plurality of pixels;
• a logic circuit region disposed below the pixel array region;
• a memory region disposed below the logic circuit region, wherein the memory region has a memory chip electrically connected to at least a portion of circuit elements included in the logic circuit region and a dummy chip disposed adjacent to the memory chip;
• and
• a chip bonding layer comprising a first chip bonding layer attaching the memory chip and the logic circuit region to each other, and a second chip bonding layer attaching the dummy chip and the logic circuit region to each other, wherein the second chip bonding layer has a modulus of elasticity lower than that of the first chip bonding layer.