Manufacturing method for thin film transistor array substrate
AssigneeShenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
InventorsChunhsiung FANG, Poyen LU
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Abstract
A manufacturing method for a thin film transistor array substrate is provided. The method includes steps of depositing a first photoresist layer on a substrate before depositing the active metal layer; removing the first photoresist layer on a surface of the gate layer from the active metal by a removing process after exposing and developing the first photoresist layer, so that a surface of the gate layer is not covered by the active metal; chemically reacting the active metal with a portion of the active layer by a predetermined process.
Claims18
A manufacturing method for a thin film transistor array substrate, comprising steps of:
- step S30:
- depositing a first metal layer on a gate insulation layer, and performing a first photomask process on the first metal layer, using a first mask, to form a gate and a gate line of the thin film transistor on a surface of the gate insulation layer;
- step S40:
- depositing a first photoresist layer on a substrate, and exposing the first photoresist layer, using a mask, to pattern the first photoresist layer and form a first photoresist region;
- step S50:
- depositing a second metal layer on the substrate,
- wherein the second metal layer is an active metal, the active metal is one or more mixtures of magnesium, aluminum, and calcium, and a film thickness of the second metal layer ranges from 5 nm to 50 nm;
- step S60:
- removing the first photoresist from the first photoresist region, and reacting the second metal layer with a portion of an active layer by a predetermined process, so that the active layer forms a first active layer region and a second active layer region;
- step S70:
- depositing an interlayer insulation layer on the substrate, and forming a via hole on the interlayer insulation layer by an etching process to expose the first active layer region;
- and
- step S80:
- depositing a third metal layer on the interlayer insulation layer, performing a second photomask process on the third metal layer, using a second mask, to form a source and a drain of the thin film transistor on a surface of the interlayer insulation layer, and depositing a passivation layer.
A manufacturing method for a thin film transistor array substrate, comprising steps of:
- step S30:
- depositing a first metal layer on a gate insulation layer, and performing a first photomask process on the first metal layer, using a first mask, to form a gate and a gate line of the thin film transistor on a surface of the gate insulation layer;
- step S40:
- depositing a first photoresist layer on a substrate, and exposing the first photoresist layer, using a mask, to pattern the first photoresist layer and form a first photoresist region;
- step S50:
- depositing a second metal layer on the substrate,
- step S60:
- removing the first photoresist from the first photoresist region, and reacting the second metal layer with a portion of an active layer by a predetermined process, so that the active layer forms a first active layer region and a second active layer region;
- step S70:
- deposition an interlayer insulation layer on the substrate, and forming a via hole on the interlayer insulation layer by an etching process to expose the first active layer region;
- and
- step S80:
- depositing a third metal layer on the interlayer insulation layer, performing a second photomask process on the third metal layer, using a second mask, to form a source and a drain of the thin film transistor on a surface of the interlayer insulation layer, and depositing a passivation layer.
Dependencies are inferred from the claim text.