US 2019/0103420 A1Published application

Array substrate, display device, and manufacturing method thereof

AssigneeShenzhen China Star Optoelectronics Technology Co., Ltd.

InventorsZhaosong LIU, YUAN-JUN HSU, Songshan LI

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Abstract

This invention discloses an array substrate, a display device and a manufacturing method thereof. The array substrate includes a base substrate and a low temperature polysilicon transistor and an oxide transistor positioned on the base substrate; the low temperature polysilicon transistor includes a laminated polysilicon layer and a first insulating layer, the first insulating layer comprising a silicon oxide layer and silicon nitride layer, wherein the silicon nitride layer is positioned between the polysilicon layer and the silicon oxide layer; the oxide transistor includes a laminated oxide semiconductor layer and a second insulating layer, and the second insulating layer is free of a silicon nitride layer. By the method, the leakage problem of the low temperature polysilicon transistor is effectively reduced, and the reliability of the oxide transistor is improved.

Claims15

Dependent claims

A display device, wherein the display device comprises an array substrate,the array substrate comprises a base substrate and a low temperature polysilicon transistor and an oxide transistor positioned on the base substrate, the base substrate is provided with a display region and a non-display region located around the display region, the low temperature polysilicon transistor being positioned in the non-display region, the oxide transistor being positioned in the display region;

the low temperature polysilicon transistor comprises a laminated polysilicon layer, a first insulating layer, and a third insulating layer, the first insulating layer comprising a silicon oxide layer and a silicon nitride layer,
wherein the silicon nitride layer is positioned between the polysilicon layer and the silicon oxide layer, the third insulating layer being positioned between the polysilicon layer and the first insulating layer;
the oxide transistor comprises a laminated oxide semiconductor layer, a second insulating layer, and a fourth insulating layer, the fourth insulating layer being positioned on the oxide semiconductor layer, and the second insulating layer is free of silicon nitride layer, the second insulating layer being a same layer as the silicon oxide layer in the first insulating layer.

An array substrate, wherein the array substrate comprises a base substrate and a low temperature polysilicon transistor and an oxide transistor positioned on the base substrate, the base substrate being provided with a display region and a non-display region located around the display region, the low temperature polysilicon transistor being positioned in the non-display region, the oxide transistor being positioned in the display region;

the low temperature polysilicon transistor comprises a laminated polysilicon layer and a first insulating layer, the first insulating layer comprises a silicon oxide layer and a silicon nitride layer,
wherein the silicon nitride layer is positioned between the polysilicon layer and the silicon oxide layer;
the oxide transistor comprises a laminated oxide semiconductor layer and a second insulating layer, the second insulating layer being free of a silicon nitride layer.

A method of manufacturing an array substrate, comprising:

a low temperature polysilicon transistor and an oxide transistor are respectively formed on a base substrate, the base substrate is provided with a display region and a non-display region located around the display region, the low temperature polysilicon transistor being positioned in the non-display region, the oxide transistor being positioned within the display region;
the low temperature polysilicon transistor formed on the base substrate comprises:
forming a polysilicon layer and a first insulating layer on the base substrate sequentially, the first insulating layer comprising a silicon oxide layer and a silicon nitride layer,
wherein the silicon nitride layer is close to the polysilicon layer;
the oxide transistor formed on the base substrate comprises:
forming a second insulating layer and an oxide semiconductor layer on the base substrate sequentially, the second insulating layer being free of a silicon nitride layer.

3 more elements

Dependencies are inferred from the claim text.