Array common source structures of three-dimensional memory devices and fabricating methods thereof

Abstract

A method for forming a 3D memory device is disclosed. The method comprises: forming an alternating conductive/dielectric stack on a substrate; forming a silt vertically penetrating the alternating conductive/dielectric stack; forming an isolation layer on a sidewall of the silt; forming a first conductive layer covering the isolation layer; performing a plasma treatment followed by a first doping process to the first conductive layer; forming a second conductive layer covering the first conductive and filling the slit; performing a second doping process followed by a rapid thermal crystallization process to the second conductive layer; removing an upper portion of the first conductive layer and the second conductive layer to form a recess in the slit; and forming a third conductive layer in the recess.

Dependencies are inferred from the claim text.