A manufacturing method of a semiconductor device that includes a non-volatile memory cell including a first transistor formed in a first transistor region in a first region over a principal surface of a semiconductor substrate and a second transistor formed in a second transistor region in the first region, adjacent to the first transistor region, and a third transistor formed in a second region of the principal surface of the semiconductor substrate, the method comprising the steps of:
- (a) sequentially forming a first oxide film, a first nitride film, a second oxide film, and a second nitride film over the principal surface of the semiconductor substrate in the first region, and sequentially forming the first oxide film, the first nitride film, and the second nitride film over the principal surface of the semiconductor substrate in the second region;
- (b) processing the first oxide film, the first nitride film, the second oxide film, and the second nitride film in the first region and further processing a portion of atop surface of the semiconductor substrate to form the first projections respectively formed by portions of the semiconductor substrate in the first region, and processing the first oxide film, the first nitride film, and the second nitride film in the second region and further processing a portion of the top surface of the semiconductor substrate to form the second projections respectively formed by portions of the semiconductor substrate in the second region;
- (c) embedding a gap between the first projections adjacent to each other and a gap between the second projections adjacent to each other with a first insulating film;
- (d) removing the second oxide film and the second nitride film in the first region while the first oxide film and the first nitride film are made to remain, and removing the first oxide film, the first nitride film, and the second nitride film in the second region;
- (e) lowering a top surface of the first insulating film to make a sidewall of an upper portion of the first projection and a sidewall of an upper portion of the second projection be exposed;
- (f) performing thermal oxidation for the semiconductor substrate to form a third oxide film over the exposed sidewall of the first projection and to form a fourth oxide film over an exposed top surface of the second projection and the exposed sidewall of the second projection;
- (g) depositing a first conductor film over the principal surface of the semiconductor substrate;
- (h) processing the first conductor film to form a first gate electrode of the first transistor that crosses over the first projection in the first transistor region and is formed by the first conductor film, and to remove the first conductor film and the third oxide film in the second transistor region;
- (i) forming a second insulating film including a charge storage film over the principal surface of the semiconductor substrate;
- (j) depositing a second conductor film over the second insulating film;
- (k) processing the second conductor film to form a second gate electrode of the second transistor that crosses over the first projection in the second transistor region and is formed by the second conductor film, and to remove the second conductor film and the second insulating film in the first transistor region and the second region;
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- (l) processing the first conductor film to form a third gate electrode of the third transistor that crosses over the second projection in the second region and is formed by the first conductor film,
- wherein the third oxide film is formed between a sidewall of the first projection and the first gate electrode in the first transistor region,
- wherein the second insulating film is formed between a sidewall of the first projection and the second gate electrode in the second transistor region, and
- wherein the fourth oxide film is formed between the top surface and the sidewall of the second projection and the third gate electrode in the second transistor region.