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US 2019/0103409 A1Published application
3d package having edge-aligned die stack with direct inter-die wire connections
AssigneeIntel Corporation
InventorsYi XU, Florence PON, Yong SHE
Life of this patent
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Abstract
An IC package, comprising a substrate and two or more vertically stacked dies disposed within the substrate, wherein all the edges of the two or more dies are aligned with respect to one another, wherein at least two dies of the two or more vertically stacked dies are coupled directly to one another by at least one wire bonded to the ones of the at least two dies.
Claims20
An IC package, comprising:
- a substrate;
- and
- two or more vertically stacked dies on the substrate and electrically coupled thereto, wherein the two or more vertically stacked dies each have a first surface over an opposing second surface and sidewalls extending orthogonally from a perimeter of the first surface to a perimeter of the second surface, wherein all the sidewalls of the two or more dies are aligned with respect to one another, such that all of the corresponding sidewalls of the two or more dies are substantially flush with each other,
- wherein at least two dies of the two or more vertically stacked dies are coupled directly to one another by at least one wire bonded to each of the at least two dies, wherein the at least one wire has a first end that is bonded to a bond pad on the first surface of a first die of the at least two dies, and a second end that is bonded to a bond pad on the first surface of a second die of the at least two dies, and wherein a die attachment film is between adjacent dies of the two or more vertically stacked dies.
1 more element
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A method, comprising:
- receiving at least two dies having a die attachment film laminated on one side;
- arranging the at least two dies in a shingle vertical die stack, the at least two dies having a first surface opposition a second surface and sidewalls extending orthogonally between the first surface and the second surface;
- bonding at least one wire to a first surface of a first die of the at least two dies and to a first surface of a second die of the at least two dies such that the at least two dies are interconnected;
- ramping a temperature of the vertical die stack to at least a glass transition temperature of the die attachment film;
- holding the temperature of the vertical die stack until the laterally offset edges of the at least two dies self-align to have substantially zero lateral offset;
- ramping the temperature of the vertical die stack to a curing temperature of the die attachment film;
- and
- holding the temperature of the vertical die stack until the die attachment film is substantially cured.
5 more elements
A system, comprising:
- a processor coupled to a memory, wherein the processor and/or the memory comprise:
- at least one vertically integrated die stack disposed over an IC package substrate, the vertically integrated die stack comprising:
- two or more vertically stacked dies on the IC package substrate and electrically coupled thereto, wherein the two or more vertically stacked dies each have a first surface over an opposing second surface and sidewalls extending orthogonally from a perimeter of the first surface to a perimeter of the second surface, wherein all the sidewalls of the two or more dies are aligned with respect to one another, such that all of the corresponding sidewalls of the two or more dies are substantially flush with each other, wherein at least two dies of the two or more vertically stacked dies are coupled directly by at least one wire bonded to each die of the two or more vertically stacked dies, and wherein the at least one wire has a first end that is bonded to a bond pad on the first surface of a first die of the at least two dies, and a second end that is bonded to a bond pad on the first surface of a second die of the at least two dies;
- and
- a die attachment film disposed between adjacent dies of the two or more vertically stacked dies, wherein the die attachment film is to liquefy at or above a glass transition temperature of the die attachment film;
- and
- a wireless interface to allow the processor to communicate with another device.
4 more elements
Dependencies are inferred from the claim text.