Back to results
US 2019/0103397 A1Published application
Protecting circuit
AssigneePixart Imaging Inc.
InventorsCHIA-SO CHUANG, KUEI-JU CHIANG
Life of this patent
Estimating the term…
Abstract
A protecting circuit provided includes an ESD transistor having a source electrode, a gate electrode, and a drain electrode; and an auxiliary circuit electrically connected to the ESD transistor. When a power supply is electrically connected to the protecting circuit in correct priority, the auxiliary circuit and the ESD transistor are turned on. When the power supply is electrically connected to the protecting circuit in reverse priority, the auxiliary circuit is turned on so as to turn off the ESD transistor.
Claims15
A protecting circuit comprising:
- an electrostatic discharge (ESD) transistor (M0) having a source electrode, a gate electrode, and a drain electrode;
- a protecting transistor (M1) having a gate electrode, a drain electrode, and a source electrode electrically connected to the gate electrode of the ESD transistor;
- a capacitor (C1) having a first electrode electrically connected to the gate electrode of the protecting transistor, and a second electrode electrically connected to the drain electrode of the protecting transistor;
- and
- a first resistor (R0) having a first electrode electrically connected to the source electrode of the protecting transistor;
- wherein a power supply is electrically connected to the protecting circuit;
- wherein the protecting transistor is configured to hold a voltage applied on the gate electrode of the ESD transistor to ensure the ESD transistor is in an off-state when the power supply supplies a negative voltage to the protecting transistor.
4 more elements
A protecting circuit comprising:
- an electrostatic discharge (ESD) transistor (M0) having a source electrode, a gate electrode, and a drain electrode;
- a protecting transistor (M1) having a gate electrode, a drain electrode, and a source electrode electrically connected to the gate electrode of the ESD transistor;
- a capacitor (C1) having a first electrode electrically connected to the gate electrode of the protecting transistor, and a second electrode electrically connected to the drain electrode of the protecting transistor;
- a first resistor (R0) having a first electrode electrically connected to the source electrode of the protecting transistor;
- and
- a second resistor (R1) having a first electrode electrically connected to the capacitor;
- wherein a power supply is electrically connected to the protecting circuit;
- wherein the protecting transistor is configured to hold a voltage applied on the gate electrode of the ESD transistor to ensure the ESD transistor is in an off-state when the power supply supplies a negative voltage to the protecting transistor.
5 more elements
A protecting circuit comprising:
- an electrostatic discharge (ESD) transistor (M0) having a source electrode, a gate electrode, and a drain electrode;
- and
- an auxiliary circuit electrically connected to the ESD transistor;
- wherein when a power supply is electrically connected to the protecting circuit in correct priority, the auxiliary circuit and the ESD transistor are turned on;
- wherein when the power supply is electrically connected to the protecting circuit in reverse priority, the auxiliary circuit is turned on so as to turn off the ESD transistor.
2 more elements
Dependencies are inferred from the claim text.