Semiconductor device and layout thereof
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsCheng-I HUANG, Ting-Wei CHIANG, Shih-Chi FU, Sheng-Fang CHENG, Jung-Chan YANG
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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsCheng-I HUANG, Ting-Wei CHIANG, Shih-Chi FU, Sheng-Fang CHENG, Jung-Chan YANG
Estimating the term…
A method includes the operations below. A first and second layout patterns corresponding to a first and second area are placed. Third layout patterns corresponding to a first continuous fin over the first area and second area, and corresponding to a second fin including separate portions spaced apart by a first recess over the first area are placed. A fourth layout pattern, corresponding to a dummy gate, at the recess portion and between the first layout pattern and the second layout pattern, is placed to generate a layout design of a semiconductor device. A side of the second area facing the first recess is substantially flat, and the semiconductor device is fabricated by a tool based on the layout design. A first length of the first continuous fin is equal to a sum of a second length of the second fin and a third length of the first recess.
A method, comprising:
A semiconductor device, comprising:
A semiconductor device, comprising:
Dependencies are inferred from the claim text.