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US 2019/0103390 A1Published application
Semiconductor Device and Method of Manufacture
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsMing-Fa Chen, Chen-Hua Yu
Life of this patent
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Abstract
Semiconductor devices are provided in which a first semiconductor device is bonded to a second semiconductor device. The bonding may occur at a gate level, a gate contact level, a first metallization layer, a middle metallization layer, or a top metallization layer of either the first semiconductor device or the second semiconductor device.
Claims20
A method of manufacturing a semiconductor device, the method comprising:
- forming a first interconnection structure over a first semiconductor substrate;
- applying a first bonding layer in physical contact with the first interconnection structure;
- forming a second interconnection structure over a second semiconductor substrate;
- and
- bonding the second interconnection structure to the first bonding layer.
2 more elements
A method of manufacturing a semiconductor device, the method comprising:
- depositing a first bonding dielectric layer in physical contact with one of either a gate electrode or a gate electrode contact;
- embedding a first conductive bonding material through the first bonding dielectric layer and in physical contact with the one of either the gate electrode or the gate electrode contact;
- and
- bonding a conductive material of a first semiconductor die directly to the first conductive bonding material.
1 more element
A method of manufacturing a semiconductor device, the method comprising:
- depositing a first bonding dielectric layer over a first semiconductor wafer and in physical contact with one of a first gate stack, a first gate electrode contact, a first interconnection structure in physical contact with the first gate electrode contact, or a second interconnection structure adjacent to the first interconnection structure;
- embedding a first bonding conductor into the first bonding dielectric layer;
- depositing a second bonding dielectric layer over a second semiconductor wafer different from the first semiconductor wafer and in physical contact with one of a second gate stack, a second gate electrode contact, a third interconnection structure in physical contact with the second gate electrode contact, or a fourth interconnection structure adjacent to the second interconnection structure;
- embedding a second bonding conductor into the second bonding dielectric layer;
- activating the first bonding dielectric layer and the second bonding dielectric layer;
- and
- contacting the first bonding dielectric layer and the second bonding dielectric layer.
4 more elements
Dependencies are inferred from the claim text.