Back to results
US 2019/0103388 A1Published application
Package on package with integrated passive electronics method and apparatus
AssigneeIntel Corporation
InventorHyoung Il Kim
Life of this patent
Estimating the term…
Loading patent…
Loading patent…
AssigneeIntel Corporation
InventorHyoung Il Kim
Estimating the term…
The present application relates to devices and techniques for a package on package multi-package integrated circuit. A component of the integrated circuit maybe located in a void formed in a circuit package of the multi-package integrated circuit. The void may be formed by fabricating a void structure with an internal void corresponding to the component. The void structure may be bonded to a first substrate of a first package in the multi-package integrated circuit. The first substrate and void structure may be encased in a mold compound. A sacrificial layer may be removed, exposing the void in the void structure. The component may be, for example, a through mold via. The first package may be coupled to a second package. Multi-package integrated circuit assemblies fabricated pursuant to the disclosure herein may comprise a higher density of electronic components, including passive electronic components.
A method of fabricating a multi-package integrated circuit comprising:
A multi-package integrated circuit comprising a top circuit package and a bottom circuit package, wherein the top circuit package comprises a first integrated circuit, a top circuit package substrate, and a passive electrical component electrically coupled to an interface side of the top circuit package substrate, wherein the bottom circuit package comprises a second integrated circuit and a void, and wherein the top circuit package and the bottom circuit package are electrically coupled and wherein the passive electrical component is positioned in or formed in the void.
A computer device comprising:
Dependencies are inferred from the claim text.