Method of manufacturing multi-chip package
AssigneeSamsung Electronics Co., Ltd.
InventorsWon-Gil HAN, Byong-Joo KIM, Yong-Je LEE, Jae-Heung LEE, Seung-Weon HA
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AssigneeSamsung Electronics Co., Ltd.
InventorsWon-Gil HAN, Byong-Joo KIM, Yong-Je LEE, Jae-Heung LEE, Seung-Weon HA
Estimating the term…
A multi-chip package includes a package substrate including a first substrate pad, a first group of semiconductor chips stacked on the package substrate, each of the first group of the semiconductor chips including bonding pads, first stud bumps arranged on the bonding pads of the first group of the semiconductor chips except for a lowermost semiconductor chip in the first group, a first conductive wire downwardly extended from the bonding pad of the lowermost semiconductor chip in the first group and connected to the first substrate pad, and a second conductive wire upwardly extended from the bonding pad of the lowermost semiconductor chip in the first group and sequentially connected to the first stud bumps.
-30. (canceled)
A method of manufacturing a multi-chip package, the method comprising:
Dependencies are inferred from the claim text.