US 2019/0103353 A1 · SEMICONDUCTOR PACKAGES AND METHODS OF FORMING SAME

Abstract

An embodiment semiconductor package includes a bare semiconductor chip, a packaged semiconductor chip adjacent the bare semiconductor chip, and a redistribution structure bonded to the bare semiconductor chip and the packaged semiconductor chip. The redistribution structure includes a first redistribution layer having a first thickness; a second redistribution layer having a second thickness; and a third redistribution layer between the first redistribution layer and the second redistribution layer. The third redistribution layer has a third thickness greater than the first thickness and the second thickness. The package further includes an underfill disposed between the bare semiconductor chip and the redistribution structure and a molding compound encapsulating the bare semiconductor chip, the packaged semiconductor chip, and the underfill.

Claims20

Dependent claims

A semiconductor package comprising:

a bare semiconductor chip;
a packaged semiconductor chip adjacent the bare semiconductor chip;
a redistribution structure bonded to the bare semiconductor chip and the packaged semiconductor chip, wherein the redistribution structure comprises:
a first redistribution layer having a first thickness;
a second redistribution layer having a second thickness;
and
a third redistribution layer between the first redistribution layer and the second redistribution layer, the third redistribution layer having a third thickness greater than the first thickness and the second thickness;
an underfill disposed between the bare semiconductor chip and the redistribution structure;
and
a molding compound encapsulating the bare semiconductor chip, the packaged semiconductor chip, and the underfill, wherein a first surface of the bare semiconductor chip and a second surface of the packaged semiconductor chip are exposed by the molding compound.

7 more elements

A semiconductor package comprising:

a molding compound encapsulating a first device and a second device, wherein the first device is a bare chip, and wherein the second device is a packaged chip;
a redistribution structure flip chip bonded to the first device and the second device, wherein surfaces of the first device and the second device opposite the redistribution structure are exposed by the molding compound, and wherein the redistribution structure comprises:
a first redistribution layer over the first device and the second device;
a second redistribution layer over the first redistribution layer, the second redistribution layer providing a ground line;
a third redistribution layer over the second redistribution layer;
a first conductive via over and electrically connected to the third redistribution layer;
and
a second conductive via over and electrically connecting the first conductive via to an external connector, wherein a diameter of the first conductive via continuously decreases in a direction towards the second conductive via, and wherein a diameter of the second conductive via continuously decreases in a direction towards the first conductive via;
and
an underfill disposed between the first device and the redistribution structure, wherein the molding compound contacts a fillet of the underfill.

7 more elements

A semiconductor package comprising:

an encapsulant encapsulating a first device and a second device, wherein the first device is a bare die, and wherein the second device is a packaged die;
a redistribution structure bonded to the first device and the second device, wherein surfaces of the first device and the second device opposite the redistribution structure are not covered by the encapsulant, and wherein the redistribution structure comprises:
a first redistribution layer over the first device and the second device;
a second redistribution layer over the first redistribution layer;
a first conductive via extending from the first redistribution layer to the second redistribution layer;
a third redistribution layer over the second redistribution layer;
a second conductive via extending from the second redistribution layer to the third redistribution layer, wherein a longitudinal axis of the first conductive via extends through a center of the first conductive via and a center of the second conductive via in a cross-sectional view;
a third conductive via over and electrically connected to the third redistribution layer, the third conductive via comprising a first seed layer;
and
a fourth conductive via over and electrically connecting the third conductive via to an external connector, the fourth conductive via comprising a second seed layer contacting the first seed layer at an interface between the third conductive via and the fourth conductive via;
and
an underfill disposed between the first device and the redistribution structure, wherein the encapsulant is disposed around the underfill.

9 more elements

Dependencies are inferred from the claim text.

Semiconductor packages and methods of forming same

Life of this patent

Semiconductor packages and methods of forming same

Life of this patent

Abstract

Claims20